c56009b2f6
The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
75 lines
1.5 KiB
Plaintext
75 lines
1.5 KiB
Plaintext
/*
|
|
* Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
#include "imx6q.dtsi"
|
|
|
|
/ {
|
|
model = "Phytec phyFLEX-i.MX6 Ouad";
|
|
compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
|
|
|
|
memory {
|
|
reg = <0x10000000 0x80000000>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
hog {
|
|
pinctrl_hog: hoggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
|
|
>;
|
|
};
|
|
};
|
|
|
|
pfla02 {
|
|
pinctrl_usdhc3_pfla02: usdhc3grp-pfla02 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
|
|
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet_3>;
|
|
phy-mode = "rgmii";
|
|
phy-reset-gpios = <&gpio3 23 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4_1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2_2>;
|
|
cd-gpios = <&gpio1 4 0>;
|
|
wp-gpios = <&gpio1 2 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3_2
|
|
&pinctrl_usdhc3_pfla02>;
|
|
cd-gpios = <&gpio1 27 0>;
|
|
wp-gpios = <&gpio1 29 0>;
|
|
status = "disabled";
|
|
};
|