![Dave Airlie](/assets/img/avatar_default.png)
* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits) agp/intel-gtt: kill previous_size assignments agp/intel-gtt: kill intel_i830_tlbflush agp/intel: split out gmch/gtt probe, part 1 agp/intel: kill mutli_gmch_chip agp/intel: uncoditionally reconfigure driver on resume agp/intel: split out the GTT support agp/intel: introduce intel-agp.h header file drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect() drm/i915/pch: Use minimal number of FDI lanes (v2) drm/i915: Add the support of memory self-refresh on Ironlake drm/i915: Move Pineview CxSR and watermark code into update_wm hook. drm/i915: Only save/restore FBC on the platform that supports FBC drm/i915: Fix the incorrect argument for SDVO SET_TV_format command drm/i915: Add support of SDVO on Ibexpeak PCH drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on). drm/i915: do not read uninitialized ->dev_private Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output." drm/i915: implement multifunction SDVO device support drm/i915: remove unused intel_pipe_get_connector() drm/i915: remove connector object in old output structure ...
1098 lines
32 KiB
C
1098 lines
32 KiB
C
/*
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* Copyright © 2006-2007 Intel Corporation
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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*/
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#include <acpi/button.h>
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#include <linux/dmi.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "drm_edid.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include <linux/acpi.h>
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/* Private structure for the integrated LVDS support */
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struct intel_lvds_priv {
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int fitting_mode;
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u32 pfit_control;
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u32 pfit_pgm_ratios;
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};
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/**
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* Sets the backlight level.
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*
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* \param level backlight level, from 0 to intel_lvds_get_max_backlight().
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*/
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static void intel_lvds_set_backlight(struct drm_device *dev, int level)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 blc_pwm_ctl, reg;
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if (HAS_PCH_SPLIT(dev))
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reg = BLC_PWM_CPU_CTL;
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else
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reg = BLC_PWM_CTL;
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blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
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I915_WRITE(reg, (blc_pwm_ctl |
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(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
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}
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/**
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* Returns the maximum level of the backlight duty cycle field.
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*/
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static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 reg;
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if (HAS_PCH_SPLIT(dev))
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reg = BLC_PWM_PCH_CTL2;
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else
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reg = BLC_PWM_CTL;
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return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
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BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
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}
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/**
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* Sets the power state for the panel.
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*/
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static void intel_lvds_set_power(struct drm_device *dev, bool on)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 pp_status, ctl_reg, status_reg, lvds_reg;
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if (HAS_PCH_SPLIT(dev)) {
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ctl_reg = PCH_PP_CONTROL;
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status_reg = PCH_PP_STATUS;
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lvds_reg = PCH_LVDS;
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} else {
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ctl_reg = PP_CONTROL;
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status_reg = PP_STATUS;
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lvds_reg = LVDS;
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}
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if (on) {
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I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
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POSTING_READ(lvds_reg);
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I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
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POWER_TARGET_ON);
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do {
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pp_status = I915_READ(status_reg);
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} while ((pp_status & PP_ON) == 0);
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intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
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} else {
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intel_lvds_set_backlight(dev, 0);
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I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
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~POWER_TARGET_ON);
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do {
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pp_status = I915_READ(status_reg);
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} while (pp_status & PP_ON);
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I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
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POSTING_READ(lvds_reg);
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}
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}
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static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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if (mode == DRM_MODE_DPMS_ON)
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intel_lvds_set_power(dev, true);
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else
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intel_lvds_set_power(dev, false);
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/* XXX: We never power down the LVDS pairs. */
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}
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static int intel_lvds_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
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if (fixed_mode) {
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if (mode->hdisplay > fixed_mode->hdisplay)
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return MODE_PANEL;
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if (mode->vdisplay > fixed_mode->vdisplay)
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return MODE_PANEL;
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}
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return MODE_OK;
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}
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static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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/*
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* float point operation is not supported . So the PANEL_RATIO_FACTOR
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* is defined, which can avoid the float point computation when
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* calculating the panel ratio.
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*/
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#define PANEL_RATIO_FACTOR 8192
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
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struct drm_encoder *tmp_encoder;
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
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u32 pfit_control = 0, pfit_pgm_ratios = 0;
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int left_border = 0, right_border = 0, top_border = 0;
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int bottom_border = 0;
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bool border = 0;
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int panel_ratio, desired_ratio, vert_scale, horiz_scale;
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int horiz_ratio, vert_ratio;
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u32 hsync_width, vsync_width;
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u32 hblank_width, vblank_width;
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u32 hsync_pos, vsync_pos;
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/* Should never happen!! */
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if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
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DRM_ERROR("Can't support LVDS on pipe A\n");
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return false;
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}
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/* Should never happen!! */
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list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
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if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
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DRM_ERROR("Can't enable LVDS and another "
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"encoder on the same pipe\n");
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return false;
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}
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}
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/* If we don't have a panel mode, there is nothing we can do */
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if (dev_priv->panel_fixed_mode == NULL)
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return true;
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/*
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* If we have timings from the BIOS for the panel, put them in
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* to the adjusted mode. The CRTC will be set up for this mode,
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* with the panel scaling set up to source from the H/VDisplay
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* of the original mode.
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*/
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if (dev_priv->panel_fixed_mode != NULL) {
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adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
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adjusted_mode->hsync_start =
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dev_priv->panel_fixed_mode->hsync_start;
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adjusted_mode->hsync_end =
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dev_priv->panel_fixed_mode->hsync_end;
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adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
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adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
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adjusted_mode->vsync_start =
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dev_priv->panel_fixed_mode->vsync_start;
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adjusted_mode->vsync_end =
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dev_priv->panel_fixed_mode->vsync_end;
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adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
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adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
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drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
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}
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/* Make sure pre-965s set dither correctly */
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if (!IS_I965G(dev)) {
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if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
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pfit_control |= PANEL_8TO6_DITHER_ENABLE;
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}
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay) {
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pfit_pgm_ratios = 0;
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border = 0;
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goto out;
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}
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/* full screen scale for now */
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if (HAS_PCH_SPLIT(dev))
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goto out;
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/* 965+ wants fuzzy fitting */
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if (IS_I965G(dev))
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pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
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PFIT_FILTER_FUZZY;
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hsync_width = adjusted_mode->crtc_hsync_end -
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adjusted_mode->crtc_hsync_start;
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vsync_width = adjusted_mode->crtc_vsync_end -
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adjusted_mode->crtc_vsync_start;
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hblank_width = adjusted_mode->crtc_hblank_end -
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adjusted_mode->crtc_hblank_start;
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vblank_width = adjusted_mode->crtc_vblank_end -
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adjusted_mode->crtc_vblank_start;
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/*
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* Deal with panel fitting options. Figure out how to stretch the
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* image based on its aspect ratio & the current panel fitting mode.
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*/
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panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
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adjusted_mode->vdisplay;
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desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
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mode->vdisplay;
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/*
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* Enable automatic panel scaling for non-native modes so that they fill
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* the screen. Should be enabled before the pipe is enabled, according
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* to register description and PRM.
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* Change the value here to see the borders for debugging
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*/
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if (!HAS_PCH_SPLIT(dev)) {
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I915_WRITE(BCLRPAT_A, 0);
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I915_WRITE(BCLRPAT_B, 0);
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}
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switch (lvds_priv->fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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/*
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* For centered modes, we have to calculate border widths &
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* heights and modify the values programmed into the CRTC.
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*/
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left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
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right_border = left_border;
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if (mode->hdisplay & 1)
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right_border++;
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top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
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bottom_border = top_border;
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if (mode->vdisplay & 1)
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bottom_border++;
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/* Set active & border values */
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adjusted_mode->crtc_hdisplay = mode->hdisplay;
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/* Keep the boder be even */
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if (right_border & 1)
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right_border++;
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/* use the border directly instead of border minuse one */
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adjusted_mode->crtc_hblank_start = mode->hdisplay +
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right_border;
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/* keep the blank width constant */
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adjusted_mode->crtc_hblank_end =
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adjusted_mode->crtc_hblank_start + hblank_width;
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/* get the hsync pos relative to hblank start */
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hsync_pos = (hblank_width - hsync_width) / 2;
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/* keep the hsync pos be even */
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if (hsync_pos & 1)
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hsync_pos++;
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adjusted_mode->crtc_hsync_start =
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adjusted_mode->crtc_hblank_start + hsync_pos;
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/* keep the hsync width constant */
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adjusted_mode->crtc_hsync_end =
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adjusted_mode->crtc_hsync_start + hsync_width;
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adjusted_mode->crtc_vdisplay = mode->vdisplay;
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/* use the border instead of border minus one */
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adjusted_mode->crtc_vblank_start = mode->vdisplay +
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bottom_border;
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/* keep the vblank width constant */
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adjusted_mode->crtc_vblank_end =
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adjusted_mode->crtc_vblank_start + vblank_width;
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/* get the vsync start postion relative to vblank start */
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vsync_pos = (vblank_width - vsync_width) / 2;
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adjusted_mode->crtc_vsync_start =
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adjusted_mode->crtc_vblank_start + vsync_pos;
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/* keep the vsync width constant */
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adjusted_mode->crtc_vsync_end =
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adjusted_mode->crtc_vsync_start + vsync_width;
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border = 1;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the spect ratio */
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pfit_control |= PFIT_ENABLE;
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if (IS_I965G(dev)) {
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/* 965+ is easy, it does everything in hw */
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if (panel_ratio > desired_ratio)
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pfit_control |= PFIT_SCALING_PILLAR;
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else if (panel_ratio < desired_ratio)
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pfit_control |= PFIT_SCALING_LETTER;
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else
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pfit_control |= PFIT_SCALING_AUTO;
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} else {
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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u32 horiz_bits, vert_bits, bits = 12;
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horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
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adjusted_mode->hdisplay;
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vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
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adjusted_mode->vdisplay;
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horiz_scale = adjusted_mode->hdisplay *
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PANEL_RATIO_FACTOR / mode->hdisplay;
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vert_scale = adjusted_mode->vdisplay *
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PANEL_RATIO_FACTOR / mode->vdisplay;
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/* retain aspect ratio */
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if (panel_ratio > desired_ratio) { /* Pillar */
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u32 scaled_width;
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scaled_width = mode->hdisplay * vert_scale /
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PANEL_RATIO_FACTOR;
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horiz_ratio = vert_ratio;
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pfit_control |= (VERT_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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/* Pillar will have left/right borders */
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left_border = (adjusted_mode->hdisplay -
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scaled_width) / 2;
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right_border = left_border;
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if (mode->hdisplay & 1) /* odd resolutions */
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right_border++;
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/* keep the border be even */
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if (right_border & 1)
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right_border++;
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adjusted_mode->crtc_hdisplay = scaled_width;
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/* use border instead of border minus one */
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adjusted_mode->crtc_hblank_start =
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scaled_width + right_border;
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/* keep the hblank width constant */
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adjusted_mode->crtc_hblank_end =
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adjusted_mode->crtc_hblank_start +
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hblank_width;
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/*
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* get the hsync start pos relative to
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* hblank start
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*/
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hsync_pos = (hblank_width - hsync_width) / 2;
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/* keep the hsync_pos be even */
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if (hsync_pos & 1)
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hsync_pos++;
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adjusted_mode->crtc_hsync_start =
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adjusted_mode->crtc_hblank_start +
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hsync_pos;
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/* keept hsync width constant */
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adjusted_mode->crtc_hsync_end =
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adjusted_mode->crtc_hsync_start +
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hsync_width;
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border = 1;
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} else if (panel_ratio < desired_ratio) { /* letter */
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u32 scaled_height = mode->vdisplay *
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horiz_scale / PANEL_RATIO_FACTOR;
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vert_ratio = horiz_ratio;
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pfit_control |= (HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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/* Letterbox will have top/bottom border */
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top_border = (adjusted_mode->vdisplay -
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scaled_height) / 2;
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bottom_border = top_border;
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if (mode->vdisplay & 1)
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bottom_border++;
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adjusted_mode->crtc_vdisplay = scaled_height;
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/* use border instead of border minus one */
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adjusted_mode->crtc_vblank_start =
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scaled_height + bottom_border;
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/* keep the vblank width constant */
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adjusted_mode->crtc_vblank_end =
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adjusted_mode->crtc_vblank_start +
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vblank_width;
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/*
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* get the vsync start pos relative to
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* vblank start
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*/
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vsync_pos = (vblank_width - vsync_width) / 2;
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adjusted_mode->crtc_vsync_start =
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adjusted_mode->crtc_vblank_start +
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vsync_pos;
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/* keep the vsync width constant */
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adjusted_mode->crtc_vsync_end =
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adjusted_mode->crtc_vsync_start +
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vsync_width;
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border = 1;
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} else {
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/* Aspects match, Let hw scale both directions */
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pfit_control |= (VERT_AUTO_SCALE |
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HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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horiz_bits = (1 << bits) * horiz_ratio /
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PANEL_RATIO_FACTOR;
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vert_bits = (1 << bits) * vert_ratio /
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PANEL_RATIO_FACTOR;
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pfit_pgm_ratios =
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((vert_bits << PFIT_VERT_SCALE_SHIFT) &
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PFIT_VERT_SCALE_MASK) |
|
|
((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
|
|
PFIT_HORIZ_SCALE_MASK);
|
|
}
|
|
break;
|
|
|
|
case DRM_MODE_SCALE_FULLSCREEN:
|
|
/*
|
|
* Full scaling, even if it changes the aspect ratio.
|
|
* Fortunately this is all done for us in hw.
|
|
*/
|
|
pfit_control |= PFIT_ENABLE;
|
|
if (IS_I965G(dev))
|
|
pfit_control |= PFIT_SCALING_AUTO;
|
|
else
|
|
pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
|
|
VERT_INTERP_BILINEAR |
|
|
HORIZ_INTERP_BILINEAR);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
out:
|
|
lvds_priv->pfit_control = pfit_control;
|
|
lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
|
|
/*
|
|
* When there exists the border, it means that the LVDS_BORDR
|
|
* should be enabled.
|
|
*/
|
|
if (border)
|
|
dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
|
|
else
|
|
dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
|
|
/*
|
|
* XXX: It would be nice to support lower refresh rates on the
|
|
* panels to reduce power consumption, and perhaps match the
|
|
* user's requested refresh rate.
|
|
*/
|
|
|
|
return true;
|
|
}
|
|
|
|
static void intel_lvds_prepare(struct drm_encoder *encoder)
|
|
{
|
|
struct drm_device *dev = encoder->dev;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
u32 reg;
|
|
|
|
if (HAS_PCH_SPLIT(dev))
|
|
reg = BLC_PWM_CPU_CTL;
|
|
else
|
|
reg = BLC_PWM_CTL;
|
|
|
|
dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
|
|
dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
|
|
BACKLIGHT_DUTY_CYCLE_MASK);
|
|
|
|
intel_lvds_set_power(dev, false);
|
|
}
|
|
|
|
static void intel_lvds_commit( struct drm_encoder *encoder)
|
|
{
|
|
struct drm_device *dev = encoder->dev;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
if (dev_priv->backlight_duty_cycle == 0)
|
|
dev_priv->backlight_duty_cycle =
|
|
intel_lvds_get_max_backlight(dev);
|
|
|
|
intel_lvds_set_power(dev, true);
|
|
}
|
|
|
|
static void intel_lvds_mode_set(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode,
|
|
struct drm_display_mode *adjusted_mode)
|
|
{
|
|
struct drm_device *dev = encoder->dev;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
|
|
struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
|
|
|
|
/*
|
|
* The LVDS pin pair will already have been turned on in the
|
|
* intel_crtc_mode_set since it has a large impact on the DPLL
|
|
* settings.
|
|
*/
|
|
|
|
if (HAS_PCH_SPLIT(dev))
|
|
return;
|
|
|
|
/*
|
|
* Enable automatic panel scaling so that non-native modes fill the
|
|
* screen. Should be enabled before the pipe is enabled, according to
|
|
* register description and PRM.
|
|
*/
|
|
I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
|
|
I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
|
|
}
|
|
|
|
/**
|
|
* Detect the LVDS connection.
|
|
*
|
|
* Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
|
|
* connected and closed means disconnected. We also send hotplug events as
|
|
* needed, using lid status notification from the input layer.
|
|
*/
|
|
static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
enum drm_connector_status status = connector_status_connected;
|
|
|
|
/* ACPI lid methods were generally unreliable in this generation, so
|
|
* don't even bother.
|
|
*/
|
|
if (IS_GEN2(dev) || IS_GEN3(dev))
|
|
return connector_status_connected;
|
|
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
|
|
*/
|
|
static int intel_lvds_get_modes(struct drm_connector *connector)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
struct drm_encoder *encoder = intel_attached_encoder(connector);
|
|
struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
int ret = 0;
|
|
|
|
if (dev_priv->lvds_edid_good) {
|
|
ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
|
|
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* Didn't get an EDID, so
|
|
* Set wide sync ranges so we get all modes
|
|
* handed to valid_mode for checking
|
|
*/
|
|
connector->display_info.min_vfreq = 0;
|
|
connector->display_info.max_vfreq = 200;
|
|
connector->display_info.min_hfreq = 0;
|
|
connector->display_info.max_hfreq = 200;
|
|
|
|
if (dev_priv->panel_fixed_mode != NULL) {
|
|
struct drm_display_mode *mode;
|
|
|
|
mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
|
|
drm_mode_probed_add(connector, mode);
|
|
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Lid events. Note the use of 'modeset_on_lid':
|
|
* - we set it on lid close, and reset it on open
|
|
* - we use it as a "only once" bit (ie we ignore
|
|
* duplicate events where it was already properly
|
|
* set/reset)
|
|
* - the suspend/resume paths will also set it to
|
|
* zero, since they restore the mode ("lid open").
|
|
*/
|
|
static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
|
|
void *unused)
|
|
{
|
|
struct drm_i915_private *dev_priv =
|
|
container_of(nb, struct drm_i915_private, lid_notifier);
|
|
struct drm_device *dev = dev_priv->dev;
|
|
struct drm_connector *connector = dev_priv->int_lvds_connector;
|
|
|
|
/*
|
|
* check and update the status of LVDS connector after receiving
|
|
* the LID nofication event.
|
|
*/
|
|
if (connector)
|
|
connector->status = connector->funcs->detect(connector);
|
|
if (!acpi_lid_open()) {
|
|
dev_priv->modeset_on_lid = 1;
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
if (!dev_priv->modeset_on_lid)
|
|
return NOTIFY_OK;
|
|
|
|
dev_priv->modeset_on_lid = 0;
|
|
|
|
mutex_lock(&dev->mode_config.mutex);
|
|
drm_helper_resume_force_mode(dev);
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
/**
|
|
* intel_lvds_destroy - unregister and free LVDS structures
|
|
* @connector: connector to free
|
|
*
|
|
* Unregister the DDC bus for this connector then free the driver private
|
|
* structure.
|
|
*/
|
|
static void intel_lvds_destroy(struct drm_connector *connector)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
if (dev_priv->lid_notifier.notifier_call)
|
|
acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
|
|
drm_sysfs_connector_remove(connector);
|
|
drm_connector_cleanup(connector);
|
|
kfree(connector);
|
|
}
|
|
|
|
static int intel_lvds_set_property(struct drm_connector *connector,
|
|
struct drm_property *property,
|
|
uint64_t value)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
|
|
if (property == dev->mode_config.scaling_mode_property &&
|
|
connector->encoder) {
|
|
struct drm_crtc *crtc = connector->encoder->crtc;
|
|
struct drm_encoder *encoder = connector->encoder;
|
|
struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
|
|
struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
|
|
|
|
if (value == DRM_MODE_SCALE_NONE) {
|
|
DRM_DEBUG_KMS("no scaling not supported\n");
|
|
return 0;
|
|
}
|
|
if (lvds_priv->fitting_mode == value) {
|
|
/* the LVDS scaling property is not changed */
|
|
return 0;
|
|
}
|
|
lvds_priv->fitting_mode = value;
|
|
if (crtc && crtc->enabled) {
|
|
/*
|
|
* If the CRTC is enabled, the display will be changed
|
|
* according to the new panel fitting mode.
|
|
*/
|
|
drm_crtc_helper_set_mode(crtc, &crtc->mode,
|
|
crtc->x, crtc->y, crtc->fb);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
|
|
.dpms = intel_lvds_dpms,
|
|
.mode_fixup = intel_lvds_mode_fixup,
|
|
.prepare = intel_lvds_prepare,
|
|
.mode_set = intel_lvds_mode_set,
|
|
.commit = intel_lvds_commit,
|
|
};
|
|
|
|
static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
|
|
.get_modes = intel_lvds_get_modes,
|
|
.mode_valid = intel_lvds_mode_valid,
|
|
.best_encoder = intel_attached_encoder,
|
|
};
|
|
|
|
static const struct drm_connector_funcs intel_lvds_connector_funcs = {
|
|
.dpms = drm_helper_connector_dpms,
|
|
.detect = intel_lvds_detect,
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.set_property = intel_lvds_set_property,
|
|
.destroy = intel_lvds_destroy,
|
|
};
|
|
|
|
|
|
static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
|
|
{
|
|
struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
|
|
|
|
if (intel_encoder->ddc_bus)
|
|
intel_i2c_destroy(intel_encoder->ddc_bus);
|
|
drm_encoder_cleanup(encoder);
|
|
kfree(intel_encoder);
|
|
}
|
|
|
|
static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
|
|
.destroy = intel_lvds_enc_destroy,
|
|
};
|
|
|
|
static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
|
|
{
|
|
DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
|
|
return 1;
|
|
}
|
|
|
|
/* These systems claim to have LVDS, but really don't */
|
|
static const struct dmi_system_id intel_no_lvds[] = {
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "Apple Mac Mini (Core series)",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "Apple Mac Mini (Core 2 series)",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "MSI IM-945GSE-A",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "Dell Studio Hybrid",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "AOpen Mini PC",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "AOpen Mini PC MP915",
|
|
.matches = {
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
|
|
DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "Aopen i945GTt-VFA",
|
|
.matches = {
|
|
DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
|
|
},
|
|
},
|
|
{
|
|
.callback = intel_no_lvds_dmi_callback,
|
|
.ident = "Clientron U800",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
|
|
},
|
|
},
|
|
|
|
{ } /* terminating entry */
|
|
};
|
|
|
|
/**
|
|
* intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
|
|
* @dev: drm device
|
|
* @connector: LVDS connector
|
|
*
|
|
* Find the reduced downclock for LVDS in EDID.
|
|
*/
|
|
static void intel_find_lvds_downclock(struct drm_device *dev,
|
|
struct drm_connector *connector)
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct drm_display_mode *scan, *panel_fixed_mode;
|
|
int temp_downclock;
|
|
|
|
panel_fixed_mode = dev_priv->panel_fixed_mode;
|
|
temp_downclock = panel_fixed_mode->clock;
|
|
|
|
mutex_lock(&dev->mode_config.mutex);
|
|
list_for_each_entry(scan, &connector->probed_modes, head) {
|
|
/*
|
|
* If one mode has the same resolution with the fixed_panel
|
|
* mode while they have the different refresh rate, it means
|
|
* that the reduced downclock is found for the LVDS. In such
|
|
* case we can set the different FPx0/1 to dynamically select
|
|
* between low and high frequency.
|
|
*/
|
|
if (scan->hdisplay == panel_fixed_mode->hdisplay &&
|
|
scan->hsync_start == panel_fixed_mode->hsync_start &&
|
|
scan->hsync_end == panel_fixed_mode->hsync_end &&
|
|
scan->htotal == panel_fixed_mode->htotal &&
|
|
scan->vdisplay == panel_fixed_mode->vdisplay &&
|
|
scan->vsync_start == panel_fixed_mode->vsync_start &&
|
|
scan->vsync_end == panel_fixed_mode->vsync_end &&
|
|
scan->vtotal == panel_fixed_mode->vtotal) {
|
|
if (scan->clock < temp_downclock) {
|
|
/*
|
|
* The downclock is already found. But we
|
|
* expect to find the lower downclock.
|
|
*/
|
|
temp_downclock = scan->clock;
|
|
}
|
|
}
|
|
}
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
if (temp_downclock < panel_fixed_mode->clock &&
|
|
i915_lvds_downclock) {
|
|
/* We found the downclock for LVDS. */
|
|
dev_priv->lvds_downclock_avail = 1;
|
|
dev_priv->lvds_downclock = temp_downclock;
|
|
DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
|
|
"Normal clock %dKhz, downclock %dKhz\n",
|
|
panel_fixed_mode->clock, temp_downclock);
|
|
}
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Enumerate the child dev array parsed from VBT to check whether
|
|
* the LVDS is present.
|
|
* If it is present, return 1.
|
|
* If it is not present, return false.
|
|
* If no child dev is parsed from VBT, it assumes that the LVDS is present.
|
|
* Note: The addin_offset should also be checked for LVDS panel.
|
|
* Only when it is non-zero, it is assumed that it is present.
|
|
*/
|
|
static int lvds_is_present_in_vbt(struct drm_device *dev)
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct child_device_config *p_child;
|
|
int i, ret;
|
|
|
|
if (!dev_priv->child_dev_num)
|
|
return 1;
|
|
|
|
ret = 0;
|
|
for (i = 0; i < dev_priv->child_dev_num; i++) {
|
|
p_child = dev_priv->child_dev + i;
|
|
/*
|
|
* If the device type is not LFP, continue.
|
|
* If the device type is 0x22, it is also regarded as LFP.
|
|
*/
|
|
if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
|
|
p_child->device_type != DEVICE_TYPE_LFP)
|
|
continue;
|
|
|
|
/* The addin_offset should be checked. Only when it is
|
|
* non-zero, it is regarded as present.
|
|
*/
|
|
if (p_child->addin_offset) {
|
|
ret = 1;
|
|
break;
|
|
}
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* intel_lvds_init - setup LVDS connectors on this device
|
|
* @dev: drm device
|
|
*
|
|
* Create the connector, register the LVDS DDC bus, and try to figure out what
|
|
* modes we can display on the LVDS panel (if present).
|
|
*/
|
|
void intel_lvds_init(struct drm_device *dev)
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct intel_encoder *intel_encoder;
|
|
struct intel_connector *intel_connector;
|
|
struct drm_connector *connector;
|
|
struct drm_encoder *encoder;
|
|
struct drm_display_mode *scan; /* *modes, *bios_mode; */
|
|
struct drm_crtc *crtc;
|
|
struct intel_lvds_priv *lvds_priv;
|
|
u32 lvds;
|
|
int pipe, gpio = GPIOC;
|
|
|
|
/* Skip init on machines we know falsely report LVDS */
|
|
if (dmi_check_system(intel_no_lvds))
|
|
return;
|
|
|
|
if (!lvds_is_present_in_vbt(dev)) {
|
|
DRM_DEBUG_KMS("LVDS is not present in VBT\n");
|
|
return;
|
|
}
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
|
|
return;
|
|
if (dev_priv->edp_support) {
|
|
DRM_DEBUG_KMS("disable LVDS for eDP support\n");
|
|
return;
|
|
}
|
|
gpio = PCH_GPIOC;
|
|
}
|
|
|
|
intel_encoder = kzalloc(sizeof(struct intel_encoder) +
|
|
sizeof(struct intel_lvds_priv), GFP_KERNEL);
|
|
if (!intel_encoder) {
|
|
return;
|
|
}
|
|
|
|
intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
|
|
if (!intel_connector) {
|
|
kfree(intel_encoder);
|
|
return;
|
|
}
|
|
|
|
connector = &intel_connector->base;
|
|
encoder = &intel_encoder->enc;
|
|
drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
|
|
DRM_MODE_CONNECTOR_LVDS);
|
|
|
|
drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
|
|
DRM_MODE_ENCODER_LVDS);
|
|
|
|
drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
|
|
intel_encoder->type = INTEL_OUTPUT_LVDS;
|
|
|
|
intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
|
|
intel_encoder->crtc_mask = (1 << 1);
|
|
if (IS_I965G(dev))
|
|
intel_encoder->crtc_mask |= (1 << 0);
|
|
drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
|
|
drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
|
|
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
|
|
connector->interlace_allowed = false;
|
|
connector->doublescan_allowed = false;
|
|
|
|
lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
|
|
intel_encoder->dev_priv = lvds_priv;
|
|
/* create the scaling mode property */
|
|
drm_mode_create_scaling_mode_property(dev);
|
|
/*
|
|
* the initial panel fitting mode will be FULL_SCREEN.
|
|
*/
|
|
|
|
drm_connector_attach_property(&intel_connector->base,
|
|
dev->mode_config.scaling_mode_property,
|
|
DRM_MODE_SCALE_FULLSCREEN);
|
|
lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
|
|
/*
|
|
* LVDS discovery:
|
|
* 1) check for EDID on DDC
|
|
* 2) check for VBT data
|
|
* 3) check to see if LVDS is already on
|
|
* if none of the above, no panel
|
|
* 4) make sure lid is open
|
|
* if closed, act like it's not there for now
|
|
*/
|
|
|
|
/* Set up the DDC bus. */
|
|
intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
|
|
if (!intel_encoder->ddc_bus) {
|
|
dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
|
|
"failed.\n");
|
|
goto failed;
|
|
}
|
|
|
|
/*
|
|
* Attempt to get the fixed panel mode from DDC. Assume that the
|
|
* preferred mode is the right one.
|
|
*/
|
|
dev_priv->lvds_edid_good = true;
|
|
|
|
if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
|
|
dev_priv->lvds_edid_good = false;
|
|
|
|
list_for_each_entry(scan, &connector->probed_modes, head) {
|
|
mutex_lock(&dev->mode_config.mutex);
|
|
if (scan->type & DRM_MODE_TYPE_PREFERRED) {
|
|
dev_priv->panel_fixed_mode =
|
|
drm_mode_duplicate(dev, scan);
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
intel_find_lvds_downclock(dev, connector);
|
|
goto out;
|
|
}
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
}
|
|
|
|
/* Failed to get EDID, what about VBT? */
|
|
if (dev_priv->lfp_lvds_vbt_mode) {
|
|
mutex_lock(&dev->mode_config.mutex);
|
|
dev_priv->panel_fixed_mode =
|
|
drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
if (dev_priv->panel_fixed_mode) {
|
|
dev_priv->panel_fixed_mode->type |=
|
|
DRM_MODE_TYPE_PREFERRED;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* If we didn't get EDID, try checking if the panel is already turned
|
|
* on. If so, assume that whatever is currently programmed is the
|
|
* correct mode.
|
|
*/
|
|
|
|
/* Ironlake: FIXME if still fail, not try pipe mode now */
|
|
if (HAS_PCH_SPLIT(dev))
|
|
goto failed;
|
|
|
|
lvds = I915_READ(LVDS);
|
|
pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
|
|
crtc = intel_get_crtc_from_pipe(dev, pipe);
|
|
|
|
if (crtc && (lvds & LVDS_PORT_EN)) {
|
|
dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
|
|
if (dev_priv->panel_fixed_mode) {
|
|
dev_priv->panel_fixed_mode->type |=
|
|
DRM_MODE_TYPE_PREFERRED;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
/* If we still don't have a mode after all that, give up. */
|
|
if (!dev_priv->panel_fixed_mode)
|
|
goto failed;
|
|
|
|
out:
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
u32 pwm;
|
|
/* make sure PWM is enabled */
|
|
pwm = I915_READ(BLC_PWM_CPU_CTL2);
|
|
pwm |= (PWM_ENABLE | PWM_PIPE_B);
|
|
I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
|
|
|
|
pwm = I915_READ(BLC_PWM_PCH_CTL1);
|
|
pwm |= PWM_PCH_ENABLE;
|
|
I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
|
|
}
|
|
dev_priv->lid_notifier.notifier_call = intel_lid_notify;
|
|
if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
|
|
DRM_DEBUG_KMS("lid notifier registration failed\n");
|
|
dev_priv->lid_notifier.notifier_call = NULL;
|
|
}
|
|
/* keep the LVDS connector */
|
|
dev_priv->int_lvds_connector = connector;
|
|
drm_sysfs_connector_add(connector);
|
|
return;
|
|
|
|
failed:
|
|
DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
|
|
if (intel_encoder->ddc_bus)
|
|
intel_i2c_destroy(intel_encoder->ddc_bus);
|
|
drm_connector_cleanup(connector);
|
|
drm_encoder_cleanup(encoder);
|
|
kfree(intel_encoder);
|
|
kfree(intel_connector);
|
|
}
|