25906052d9
Since ALE table is a common resource for both the interfaces in Dual EMAC
mode and while bringing up the second interface in cpsw_ndo_set_rx_mode()
all the multicast entries added by the first interface is flushed out and
only second interface multicast addresses are added. Fixing this by
flushing multicast addresses based on dual EMAC port vlans which will not
affect the other emac port multicast addresses.
Fixes: d9ba8f9 (driver: net: ethernet: cpsw: dual emac interface implementation)
Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
115 lines
3.3 KiB
C
115 lines
3.3 KiB
C
/*
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* Texas Instruments 3-Port Ethernet Switch Address Lookup Engine APIs
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*
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* Copyright (C) 2012 Texas Instruments
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __TI_CPSW_ALE_H__
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#define __TI_CPSW_ALE_H__
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struct cpsw_ale_params {
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struct device *dev;
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void __iomem *ale_regs;
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unsigned long ale_ageout; /* in secs */
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unsigned long ale_entries;
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unsigned long ale_ports;
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};
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struct cpsw_ale {
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struct cpsw_ale_params params;
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struct timer_list timer;
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unsigned long ageout;
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int allmulti;
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};
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enum cpsw_ale_control {
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/* global */
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ALE_ENABLE,
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ALE_CLEAR,
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ALE_AGEOUT,
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ALE_P0_UNI_FLOOD,
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ALE_VLAN_NOLEARN,
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ALE_NO_PORT_VLAN,
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ALE_OUI_DENY,
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ALE_BYPASS,
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ALE_RATE_LIMIT_TX,
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ALE_VLAN_AWARE,
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ALE_AUTH_ENABLE,
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ALE_RATE_LIMIT,
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/* port controls */
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ALE_PORT_STATE,
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ALE_PORT_DROP_UNTAGGED,
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ALE_PORT_DROP_UNKNOWN_VLAN,
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ALE_PORT_NOLEARN,
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ALE_PORT_NO_SA_UPDATE,
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ALE_PORT_UNKNOWN_VLAN_MEMBER,
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ALE_PORT_UNKNOWN_MCAST_FLOOD,
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ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
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ALE_PORT_UNTAGGED_EGRESS,
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ALE_PORT_BCAST_LIMIT,
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ALE_PORT_MCAST_LIMIT,
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ALE_NUM_CONTROLS,
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};
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enum cpsw_ale_port_state {
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ALE_PORT_STATE_DISABLE = 0x00,
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ALE_PORT_STATE_BLOCK = 0x01,
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ALE_PORT_STATE_LEARN = 0x02,
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ALE_PORT_STATE_FORWARD = 0x03,
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};
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/* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */
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#define ALE_SECURE BIT(0)
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#define ALE_BLOCKED BIT(1)
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#define ALE_SUPER BIT(2)
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#define ALE_VLAN BIT(3)
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#define ALE_PORT_HOST BIT(0)
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#define ALE_PORT_1 BIT(1)
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#define ALE_PORT_2 BIT(2)
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#define ALE_MCAST_FWD 0
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#define ALE_MCAST_BLOCK_LEARN_FWD 1
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#define ALE_MCAST_FWD_LEARN 2
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#define ALE_MCAST_FWD_2 3
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#define ALE_ENTRY_BITS 68
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#define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)
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struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params);
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int cpsw_ale_destroy(struct cpsw_ale *ale);
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void cpsw_ale_start(struct cpsw_ale *ale);
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void cpsw_ale_stop(struct cpsw_ale *ale);
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int cpsw_ale_set_ageout(struct cpsw_ale *ale, int ageout);
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int cpsw_ale_flush(struct cpsw_ale *ale, int port_mask);
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int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid);
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int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
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int flags, u16 vid);
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int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port,
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int flags, u16 vid);
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int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
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int flags, u16 vid, int mcast_state);
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int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
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int flags, u16 vid);
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int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
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int reg_mcast, int unreg_mcast);
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int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port);
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void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti);
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int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control);
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int cpsw_ale_control_set(struct cpsw_ale *ale, int port,
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int control, int value);
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void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data);
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#endif
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