9ee1acefa8
This patch implements davinci serial cleanups towards having this code reusable on tnetv107x. The change reuses the platform data membase field to hold the remapped space. By disabling the UPF_IOREMAP flag in the platform data, we prevent the 8250 driver from repeating the ioremap. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
116 lines
3 KiB
C
116 lines
3 KiB
C
/*
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* TI DaVinci serial driver
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/serial.h>
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#include <mach/cputype.h>
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static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
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int offset)
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{
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offset <<= up->regshift;
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WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset);
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return (unsigned int)__raw_readl(up->membase + offset);
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}
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static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
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int value)
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{
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offset <<= p->regshift;
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WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset);
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__raw_writel(value, p->membase + offset);
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}
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static void __init davinci_serial_reset(struct plat_serial8250_port *p)
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{
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unsigned int pwremu = 0;
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serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
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/* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
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serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
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mdelay(10);
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pwremu |= (0x3 << 13);
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pwremu |= 0x1;
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serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
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if (cpu_is_davinci_dm646x())
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serial_write_reg(p, UART_DM646X_SCR,
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UART_DM646X_SCR_TX_WATERMARK);
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}
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int __init davinci_serial_init(struct davinci_uart_config *info)
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{
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int i;
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char name[16];
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struct clk *uart_clk;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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struct device *dev = &soc_info->serial_dev->dev;
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struct plat_serial8250_port *p = dev->platform_data;
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/*
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* Make sure the serial ports are muxed on at this point.
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* You have to mux them off in device drivers later on if not needed.
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*/
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for (i = 0; p->flags; i++, p++) {
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if (!(info->enabled_uarts & (1 << i)))
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continue;
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sprintf(name, "uart%d", i);
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uart_clk = clk_get(dev, name);
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if (IS_ERR(uart_clk)) {
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printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
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__func__, __LINE__, i);
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continue;
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}
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clk_enable(uart_clk);
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p->uartclk = clk_get_rate(uart_clk);
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if (!p->membase && p->mapbase) {
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p->membase = ioremap(p->mapbase, SZ_4K);
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if (p->membase)
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p->flags &= ~UPF_IOREMAP;
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else
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pr_err("uart regs ioremap failed\n");
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}
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if (p->membase)
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davinci_serial_reset(p);
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}
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return platform_device_register(soc_info->serial_dev);
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}
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