fccb9a81fd
MADT contains the information for MPIDR which is essential for SMP initialization, parse the GIC cpu interface structures to get the MPIDR value and map it to cpu_logical_map(), and add enabled cpu with valid MPIDR into cpu_possible_map. ACPI 5.1 only has two explicit methods to boot up SMP, PSCI and Parking protocol, but the Parking protocol is only specified for ARMv7 now, so make PSCI as the only way for the SMP boot protocol before some updates for the ACPI spec or the Parking protocol spec. Parking protocol patches for SMP boot will be sent to upstream when the new version of Parking protocol is ready. CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> CC: Mark Rutland <mark.rutland@arm.com> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Yijing Wang <wangyijing@huawei.com> Tested-by: Mark Langsdorf <mlangsdo@redhat.com> Tested-by: Jon Masters <jcm@redhat.com> Tested-by: Timur Tabi <timur@codeaurora.org> Tested-by: Robert Richter <rrichter@cavium.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Grant Likely <grant.likely@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/*
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* CPU kernel entry/exit control
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*
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* Copyright (C) 2013 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/cpu_ops.h>
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#include <asm/smp_plat.h>
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#include <linux/errno.h>
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#include <linux/of.h>
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#include <linux/string.h>
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extern const struct cpu_operations smp_spin_table_ops;
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extern const struct cpu_operations cpu_psci_ops;
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const struct cpu_operations *cpu_ops[NR_CPUS];
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static const struct cpu_operations *supported_cpu_ops[] __initconst = {
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#ifdef CONFIG_SMP
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&smp_spin_table_ops,
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#endif
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&cpu_psci_ops,
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NULL,
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};
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const struct cpu_operations * __init cpu_get_ops(const char *name)
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{
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const struct cpu_operations **ops = supported_cpu_ops;
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while (*ops) {
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if (!strcmp(name, (*ops)->name))
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return *ops;
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ops++;
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}
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return NULL;
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}
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/*
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* Read a cpu's enable method from the device tree and record it in cpu_ops.
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*/
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int __init cpu_read_ops(struct device_node *dn, int cpu)
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{
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const char *enable_method = of_get_property(dn, "enable-method", NULL);
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if (!enable_method) {
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/*
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* The boot CPU may not have an enable method (e.g. when
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* spin-table is used for secondaries). Don't warn spuriously.
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*/
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if (cpu != 0)
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pr_err("%s: missing enable-method property\n",
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dn->full_name);
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return -ENOENT;
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}
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cpu_ops[cpu] = cpu_get_ops(enable_method);
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if (!cpu_ops[cpu]) {
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pr_warn("%s: unsupported enable-method property: %s\n",
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dn->full_name, enable_method);
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return -EOPNOTSUPP;
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}
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return 0;
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}
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void __init cpu_read_bootcpu_ops(void)
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{
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struct device_node *dn = of_get_cpu_node(0, NULL);
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if (!dn) {
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pr_err("Failed to find device node for boot cpu\n");
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return;
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}
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cpu_read_ops(dn, 0);
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}
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