![Hao Wu](/assets/img/avatar_default.png)
This patch adds one new header file for the common data structure used in Intel Penwell/Langwell MID Platform OTG Transceiver drivers. After switched to the common data structure, Langwell/Penwell OTG Transceiver driver will provide an unified interface to host/client driver. Reported-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Hao Wu <hao.wu@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
181 lines
4.7 KiB
C
181 lines
4.7 KiB
C
/*
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* Intel MID (Langwell/Penwell) USB OTG Transceiver driver
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* Copyright (C) 2008 - 2010, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __INTEL_MID_OTG_H
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#define __INTEL_MID_OTG_H
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#include <linux/pm.h>
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#include <linux/usb/otg.h>
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#include <linux/notifier.h>
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struct intel_mid_otg_xceiv;
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/* This is a common data structure for Intel MID platform to
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* save values of the OTG state machine */
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struct otg_hsm {
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/* Input */
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int a_bus_resume;
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int a_bus_suspend;
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int a_conn;
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int a_sess_vld;
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int a_srp_det;
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int a_vbus_vld;
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int b_bus_resume;
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int b_bus_suspend;
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int b_conn;
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int b_se0_srp;
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int b_ssend_srp;
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int b_sess_end;
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int b_sess_vld;
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int id;
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/* id values */
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#define ID_B 0x05
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#define ID_A 0x04
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#define ID_ACA_C 0x03
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#define ID_ACA_B 0x02
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#define ID_ACA_A 0x01
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int power_up;
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int adp_change;
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int test_device;
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/* Internal variables */
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int a_set_b_hnp_en;
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int b_srp_done;
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int b_hnp_enable;
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int hnp_poll_enable;
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/* Timeout indicator for timers */
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int a_wait_vrise_tmout;
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int a_wait_bcon_tmout;
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int a_aidl_bdis_tmout;
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int a_bidl_adis_tmout;
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int a_bidl_adis_tmr;
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int a_wait_vfall_tmout;
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int b_ase0_brst_tmout;
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int b_bus_suspend_tmout;
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int b_srp_init_tmout;
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int b_srp_fail_tmout;
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int b_srp_fail_tmr;
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int b_adp_sense_tmout;
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/* Informative variables */
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int a_bus_drop;
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int a_bus_req;
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int a_clr_err;
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int b_bus_req;
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int a_suspend_req;
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int b_bus_suspend_vld;
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/* Output */
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int drv_vbus;
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int loc_conn;
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int loc_sof;
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/* Others */
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int vbus_srp_up;
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};
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/* must provide ULPI access function to read/write registers implemented in
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* ULPI address space */
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struct iotg_ulpi_access_ops {
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int (*read)(struct intel_mid_otg_xceiv *iotg, u8 reg, u8 *val);
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int (*write)(struct intel_mid_otg_xceiv *iotg, u8 reg, u8 val);
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};
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#define OTG_A_DEVICE 0x0
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#define OTG_B_DEVICE 0x1
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/*
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* the Intel MID (Langwell/Penwell) otg transceiver driver needs to interact
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* with device and host drivers to implement the USB OTG related feature. More
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* function members are added based on otg_transceiver data structure for this
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* purpose.
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*/
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struct intel_mid_otg_xceiv {
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struct otg_transceiver otg;
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struct otg_hsm hsm;
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/* base address */
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void __iomem *base;
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/* ops to access ulpi */
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struct iotg_ulpi_access_ops ulpi_ops;
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/* atomic notifier for interrupt context */
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struct atomic_notifier_head iotg_notifier;
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/* start/stop USB Host function */
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int (*start_host)(struct intel_mid_otg_xceiv *iotg);
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int (*stop_host)(struct intel_mid_otg_xceiv *iotg);
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/* start/stop USB Peripheral function */
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int (*start_peripheral)(struct intel_mid_otg_xceiv *iotg);
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int (*stop_peripheral)(struct intel_mid_otg_xceiv *iotg);
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/* start/stop ADP sense/probe function */
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int (*set_adp_probe)(struct intel_mid_otg_xceiv *iotg,
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bool enabled, int dev);
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int (*set_adp_sense)(struct intel_mid_otg_xceiv *iotg,
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bool enabled);
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#ifdef CONFIG_PM
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/* suspend/resume USB host function */
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int (*suspend_host)(struct intel_mid_otg_xceiv *iotg,
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pm_message_t message);
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int (*resume_host)(struct intel_mid_otg_xceiv *iotg);
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int (*suspend_peripheral)(struct intel_mid_otg_xceiv *iotg,
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pm_message_t message);
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int (*resume_peripheral)(struct intel_mid_otg_xceiv *iotg);
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#endif
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};
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static inline
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struct intel_mid_otg_xceiv *otg_to_mid_xceiv(struct otg_transceiver *otg)
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{
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return container_of(otg, struct intel_mid_otg_xceiv, otg);
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}
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#define MID_OTG_NOTIFY_CONNECT 0x0001
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#define MID_OTG_NOTIFY_DISCONN 0x0002
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#define MID_OTG_NOTIFY_HSUSPEND 0x0003
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#define MID_OTG_NOTIFY_HRESUME 0x0004
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#define MID_OTG_NOTIFY_CSUSPEND 0x0005
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#define MID_OTG_NOTIFY_CRESUME 0x0006
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#define MID_OTG_NOTIFY_HOSTADD 0x0007
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#define MID_OTG_NOTIFY_HOSTREMOVE 0x0008
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#define MID_OTG_NOTIFY_CLIENTADD 0x0009
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#define MID_OTG_NOTIFY_CLIENTREMOVE 0x000a
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static inline int
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intel_mid_otg_register_notifier(struct intel_mid_otg_xceiv *iotg,
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struct notifier_block *nb)
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{
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return atomic_notifier_chain_register(&iotg->iotg_notifier, nb);
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}
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static inline void
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intel_mid_otg_unregister_notifier(struct intel_mid_otg_xceiv *iotg,
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struct notifier_block *nb)
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{
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atomic_notifier_chain_unregister(&iotg->iotg_notifier, nb);
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}
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#endif /* __INTEL_MID_OTG_H */
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