a09d2831b3
This updates the existing boards that specify the register width through platform data to use the resource flags instead. This eliminates platform data completely in most cases, and permits further improvement in the heartbeat driver as well as shrinking the overall private data size. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
195 lines
4.6 KiB
C
195 lines
4.6 KiB
C
/*
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* Renesas Technology Corp. SH7786 Urquell Support.
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*
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* Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
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* Copyright (C) 2009 Paul Mundt
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*
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* Based on board-sh7785lcr.c
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* Copyright (C) 2008 Yoshihiro Shimoda
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/fb.h>
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#include <linux/smc91x.h>
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#include <linux/mtd/physmap.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/irq.h>
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#include <mach/urquell.h>
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#include <cpu/sh7786.h>
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#include <asm/heartbeat.h>
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#include <asm/sizes.h>
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/*
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* bit 1234 5678
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*----------------------------
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* SW1 0101 0010 -> Pck 33MHz version
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* (1101 0010) Pck 66MHz version
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* SW2 0x1x xxxx -> little endian
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* 29bit mode
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* SW47 0001 1000 -> CS0 : on-board flash
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* CS1 : SRAM, registers, LAN, PCMCIA
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* 38400 bps for SCIF1
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*
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* Address
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* 0x00000000 - 0x04000000 (CS0) Nor Flash
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* 0x04000000 - 0x04200000 (CS1) SRAM
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* 0x05000000 - 0x05800000 (CS1) on board register
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* 0x05800000 - 0x06000000 (CS1) LAN91C111
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* 0x06000000 - 0x06400000 (CS1) PCMCIA
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* 0x08000000 - 0x10000000 (CS2-CS3) DDR3
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* 0x10000000 - 0x14000000 (CS4) PCIe
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* 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
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* 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
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* 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash
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* 0x1C000000 - (CS7) SH7786 Control register
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*/
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/* HeartBeat */
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static struct resource heartbeat_resource = {
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.start = BOARDREG(SLEDR),
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.end = BOARDREG(SLEDR),
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.num_resources = 1
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.resource = &heartbeat_resource,
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};
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/* LAN91C111 */
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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};
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static struct resource smc91x_eth_resources[] = {
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[0] = {
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.name = "SMC91C111" ,
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.start = 0x05800300,
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.end = 0x0580030f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 11,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_eth_device = {
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.name = "smc91x",
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.num_resources = ARRAY_SIZE(smc91x_eth_resources),
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.resource = smc91x_eth_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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/* Nor Flash */
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static struct mtd_partition nor_flash_partitions[] = {
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{
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.name = "loader",
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.offset = 0x00000000,
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.size = SZ_512K,
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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},
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{
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.name = "bootenv",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_512K,
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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},
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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},
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{
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.name = "data",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data nor_flash_data = {
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.width = 2,
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.parts = nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(nor_flash_partitions),
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};
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static struct resource nor_flash_resources[] = {
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[0] = {
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.start = NOR_FLASH_ADDR,
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.end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device nor_flash_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &nor_flash_data,
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},
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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.resource = nor_flash_resources,
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};
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static struct platform_device *urquell_devices[] __initdata = {
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&heartbeat_device,
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&smc91x_eth_device,
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&nor_flash_device,
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};
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static int __init urquell_devices_setup(void)
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{
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/* USB */
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gpio_request(GPIO_FN_USB_OVC0, NULL);
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gpio_request(GPIO_FN_USB_PENC0, NULL);
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/* enable LAN */
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__raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001,
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UBOARDREG(IRL2MSKR));
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return platform_add_devices(urquell_devices,
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ARRAY_SIZE(urquell_devices));
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}
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device_initcall(urquell_devices_setup);
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static void urquell_power_off(void)
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{
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__raw_writew(0xa5a5, UBOARDREG(SRSTR));
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}
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static void __init urquell_init_irq(void)
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{
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plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
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}
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static int urquell_mode_pins(void)
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{
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return __raw_readw(UBOARDREG(MDSWMR));
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}
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/* Initialize the board */
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static void __init urquell_setup(char **cmdline_p)
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{
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printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
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pm_power_off = urquell_power_off;
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_urquell __initmv = {
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.mv_name = "Urquell",
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.mv_setup = urquell_setup,
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.mv_init_irq = urquell_init_irq,
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.mv_mode_pins = urquell_mode_pins,
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};
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