0ca9480076
As a step towards making the atomic64 API use consistent types treewide, let's have the s390 atomic64 implementation use s64 as the underlying type for atomic64_t, rather than long, matching the generated headers. As atomic64_read() depends on the generic defintion of atomic64_t, this still returns long. This will be converted in a subsequent patch. The s390-internal __atomic64_*() ops are also used by the s390 bitops, and expect pointers to long. Since atomic64_t::counter will be converted to s64 in a subsequent patch, pointes to this are explicitly cast to pointers to long when passed to __atomic64_*() ops. Otherwise, there should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: aou@eecs.berkeley.edu Cc: arnd@arndb.de Cc: bp@alien8.de Cc: catalin.marinas@arm.com Cc: davem@davemloft.net Cc: fenghua.yu@intel.com Cc: herbert@gondor.apana.org.au Cc: ink@jurassic.park.msu.ru Cc: jhogan@kernel.org Cc: linux@armlinux.org.uk Cc: mattst88@gmail.com Cc: mpe@ellerman.id.au Cc: palmer@sifive.com Cc: paul.burton@mips.com Cc: paulus@samba.org Cc: ralf@linux-mips.org Cc: rth@twiddle.net Cc: tony.luck@intel.com Cc: vgupta@synopsys.com Link: https://lkml.kernel.org/r/20190522132250.26499-14-mark.rutland@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
153 lines
3.4 KiB
C
153 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999, 2016
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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* Arnd Bergmann,
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*/
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#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/atomic_ops.h>
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#include <asm/barrier.h>
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#include <asm/cmpxchg.h>
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#define ATOMIC_INIT(i) { (i) }
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static inline int atomic_read(const atomic_t *v)
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{
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int c;
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asm volatile(
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" l %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic_set(atomic_t *v, int i)
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{
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asm volatile(
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" st %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter) + i;
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}
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static inline int atomic_fetch_add(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter);
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}
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static inline void atomic_add(int i, atomic_t *v)
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{
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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if (__builtin_constant_p(i) && (i > -129) && (i < 128)) {
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__atomic_add_const(i, &v->counter);
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return;
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}
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#endif
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__atomic_add(i, &v->counter);
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}
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#define atomic_sub(_i, _v) atomic_add(-(int)(_i), _v)
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#define atomic_sub_return(_i, _v) atomic_add_return(-(int)(_i), _v)
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#define atomic_fetch_sub(_i, _v) atomic_fetch_add(-(int)(_i), _v)
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#define ATOMIC_OPS(op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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__atomic_##op(i, &v->counter); \
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} \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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return __atomic_##op##_barrier(i, &v->counter); \
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}
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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return __atomic_cmpxchg(&v->counter, old, new);
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}
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#define ATOMIC64_INIT(i) { (i) }
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static inline s64 atomic64_read(const atomic64_t *v)
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{
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s64 c;
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asm volatile(
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" lg %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic64_set(atomic64_t *v, s64 i)
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{
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asm volatile(
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" stg %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline s64 atomic64_add_return(s64 i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, (long *)&v->counter) + i;
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}
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static inline s64 atomic64_fetch_add(s64 i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, (long *)&v->counter);
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}
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static inline void atomic64_add(s64 i, atomic64_t *v)
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{
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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if (__builtin_constant_p(i) && (i > -129) && (i < 128)) {
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__atomic64_add_const(i, (long *)&v->counter);
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return;
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}
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#endif
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__atomic64_add(i, (long *)&v->counter);
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}
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static inline s64 atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
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{
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return __atomic64_cmpxchg((long *)&v->counter, old, new);
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}
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#define ATOMIC64_OPS(op) \
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static inline void atomic64_##op(s64 i, atomic64_t *v) \
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{ \
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__atomic64_##op(i, (long *)&v->counter); \
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} \
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static inline long atomic64_fetch_##op(s64 i, atomic64_t *v) \
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{ \
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return __atomic64_##op##_barrier(i, (long *)&v->counter); \
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}
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ATOMIC64_OPS(and)
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ATOMIC64_OPS(or)
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ATOMIC64_OPS(xor)
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#undef ATOMIC64_OPS
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#define atomic64_sub_return(_i, _v) atomic64_add_return(-(s64)(_i), _v)
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#define atomic64_fetch_sub(_i, _v) atomic64_fetch_add(-(s64)(_i), _v)
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#define atomic64_sub(_i, _v) atomic64_add(-(s64)(_i), _v)
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#endif /* __ARCH_S390_ATOMIC__ */
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