6bc9a3966f
This is the complete set of new arch Score's files for linux. Score instruction set support 16bits, 32bits and 64bits instruction, Score SOC had been used in game machine and LCD TV. Signed-off-by: Chen Liqin <liqin.chen@sunplusct.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
100 lines
2.8 KiB
C
100 lines
2.8 KiB
C
/*
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* arch/score/kernel/time.c
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*
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* Score Processor version.
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*
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* Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
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* Chen Liqin <liqin.chen@sunplusct.com>
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* Lennox Wu <lennox.wu@sunplusct.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <asm/scoreregs.h>
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irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evdev = dev_id;
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/* clear timer interrupt flag */
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outl(1, P_TIMER0_CPP_REG);
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evdev->event_handler(evdev);
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return IRQ_HANDLED;
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}
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static struct irqaction timer_irq = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.name = "timer",
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};
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static int score_timer_set_next_event(unsigned long delta,
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struct clock_event_device *evdev)
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{
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outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
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outl(delta, P_TIMER0_PRELOAD);
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outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
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return 0;
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}
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static void score_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evdev)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
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outl(SYSTEM_CLOCK/HZ, P_TIMER0_PRELOAD);
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outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_UNUSED:
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break;
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default:
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BUG();
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}
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}
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static struct clock_event_device score_clockevent = {
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.name = "score_clockevent",
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.shift = 16,
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.set_next_event = score_timer_set_next_event,
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.set_mode = score_timer_set_mode,
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};
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void __init time_init(void)
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{
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timer_irq.dev_id = &score_clockevent;
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setup_irq(IRQ_TIMER , &timer_irq);
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/* setup COMPARE clockevent */
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score_clockevent.mult = div_sc(SYSTEM_CLOCK, NSEC_PER_SEC,
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score_clockevent.shift);
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score_clockevent.max_delta_ns = clockevent_delta2ns((u32)~0,
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&score_clockevent);
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score_clockevent.min_delta_ns = clockevent_delta2ns(50,
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&score_clockevent) + 1;
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score_clockevent.cpumask = cpumask_of(0);
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clockevents_register_device(&score_clockevent);
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}
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