d50240a5f6
TCR.TBI0 can be used to cause hardware address translation to ignore the top byte of userspace virtual addresses. Whilst not especially useful in standard C programs, this can be used by JITs to `tag' pointers with various pieces of metadata. This patch enables this bit for AArch64 Linux, and adds a new file to Documentation/arm64/ which describes some potential caveats when using tagged virtual addresses. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
35 lines
1.5 KiB
Plaintext
35 lines
1.5 KiB
Plaintext
Tagged virtual addresses in AArch64 Linux
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=========================================
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Author: Will Deacon <will.deacon@arm.com>
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Date : 12 June 2013
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This document briefly describes the provision of tagged virtual
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addresses in the AArch64 translation system and their potential uses
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in AArch64 Linux.
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The kernel configures the translation tables so that translations made
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via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
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the virtual address ignored by the translation hardware. This frees up
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this byte for application use, with the following caveats:
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(1) The kernel requires that all user addresses passed to EL1
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are tagged with tag 0x00. This means that any syscall
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parameters containing user virtual addresses *must* have
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their top byte cleared before trapping to the kernel.
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(2) Tags are not guaranteed to be preserved when delivering
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signals. This means that signal handlers in applications
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making use of tags cannot rely on the tag information for
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user virtual addresses being maintained for fields inside
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siginfo_t. One exception to this rule is for signals raised
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in response to debug exceptions, where the tag information
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will be preserved.
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(3) Special care should be taken when using tagged pointers,
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since it is likely that C compilers will not hazard two
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addresses differing only in the upper bits.
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The architecture prevents the use of a tagged PC, so the upper byte will
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be set to a sign-extension of bit 55 on exception return.
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