![Michael Fiedler](/assets/img/avatar_default.png)
Fixes scripts/checkpatch.pl warning. Signed-off-by: Michael Fiedler <michael.fiedler@informatik.stud.uni-erlangen.de> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
125 lines
4.3 KiB
C
125 lines
4.3 KiB
C
#ifndef __RTL8712_HAL_H__
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#define __RTL8712_HAL_H__
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enum _HW_VERSION {
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RTL8712_FPGA,
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RTL8712_1stCUT, /*A Cut (RTL8712_ASIC)*/
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RTL8712_2ndCUT, /*B Cut*/
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RTL8712_3rdCUT, /*C Cut*/
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};
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enum _LOOPBACK_TYPE {
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RTL8712_AIR_TRX = 0,
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RTL8712_MAC_LBK,
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RTL8712_BB_LBK,
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RTL8712_MAC_FW_LBK = 4,
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RTL8712_BB_FW_LBK = 8,
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};
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enum RTL871X_HCI_TYPE {
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RTL8712_SDIO,
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RTL8712_USB,
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};
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enum RTL8712_RF_CONFIG {
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RTL8712_RF_1T1R,
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RTL8712_RF_1T2R,
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RTL8712_RF_2T2R
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};
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enum _RTL8712_HCI_TYPE_ {
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RTL8712_HCI_TYPE_PCIE = 0x01,
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RTL8712_HCI_TYPE_AP_PCIE = 0x81,
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RTL8712_HCI_TYPE_USB = 0x02,
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RTL8712_HCI_TYPE_92USB = 0x02,
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RTL8712_HCI_TYPE_AP_USB = 0x82,
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RTL8712_HCI_TYPE_72USB = 0x12,
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RTL8712_HCI_TYPE_SDIO = 0x04,
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RTL8712_HCI_TYPE_72SDIO = 0x14
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};
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struct fw_priv { /*8-bytes alignment required*/
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/*--- long word 0 ----*/
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unsigned char signature_0; /*0x12: CE product, 0x92: IT product*/
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unsigned char signature_1; /*0x87: CE product, 0x81: IT product*/
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unsigned char hci_sel; /*0x81: PCI-AP, 01:PCIe, 02: 92S-U, 0x82: USB-AP,
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* 0x12: 72S-U, 03:SDIO*/
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unsigned char chip_version; /*the same value as register value*/
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unsigned char customer_ID_0; /*customer ID low byte*/
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unsigned char customer_ID_1; /*customer ID high byte*/
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unsigned char rf_config; /*0x11: 1T1R, 0x12: 1T2R, 0x92: 1T2R turbo,
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* 0x22: 2T2R*/
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unsigned char usb_ep_num; /* 4: 4EP, 6: 6EP, 11: 11EP*/
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/*--- long word 1 ----*/
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unsigned char regulatory_class_0; /*regulatory class bit map 0*/
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unsigned char regulatory_class_1; /*regulatory class bit map 1*/
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unsigned char regulatory_class_2; /*regulatory class bit map 2*/
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unsigned char regulatory_class_3; /*regulatory class bit map 3*/
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unsigned char rfintfs; /* 0:SWSI, 1:HWSI, 2:HWPI*/
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unsigned char def_nettype;
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unsigned char turboMode;
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unsigned char lowPowerMode;/* 0: noral mode, 1: low power mode*/
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/*--- long word 2 ----*/
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unsigned char lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/
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unsigned char mp_mode; /* 1: for MP use, 0: for normal driver */
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unsigned char vcsType; /* 0:off 1:on 2:auto */
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unsigned char vcsMode; /* 1:RTS/CTS 2:CTS to self */
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unsigned char rsvd022;
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unsigned char rsvd023;
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unsigned char rsvd024;
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unsigned char rsvd025;
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/*--- long word 3 ----*/
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unsigned char qos_en; /*1: QoS enable*/
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unsigned char bw_40MHz_en; /*1: 40MHz BW enable*/
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unsigned char AMSDU2AMPDU_en; /*1: 4181 convert AMSDU to AMPDU,
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* 0: disable*/
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unsigned char AMPDU_en; /*1: 11n AMPDU enable*/
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unsigned char rate_control_offload; /*1: FW offloads,0: driver handles*/
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unsigned char aggregation_offload; /*1: FW offloads,0: driver handles*/
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unsigned char rsvd030;
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unsigned char rsvd031;
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/*--- long word 4 ----*/
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unsigned char beacon_offload; /* 1. FW offloads, 0: driver handles*/
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unsigned char MLME_offload; /* 2. FW offloads, 0: driver handles*/
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unsigned char hwpc_offload; /* 3. FW offloads, 0: driver handles*/
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unsigned char tcp_checksum_offload; /*4. FW offloads,0: driver handles*/
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unsigned char tcp_offload; /* 5. FW offloads, 0: driver handles*/
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unsigned char ps_control_offload; /* 6. FW offloads, 0: driver handles*/
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unsigned char WWLAN_offload; /* 7. FW offloads, 0: driver handles*/
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unsigned char rsvd040;
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/*--- long word 5 ----*/
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unsigned char tcp_tx_frame_len_L; /*tcp tx packet length low byte*/
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unsigned char tcp_tx_frame_len_H; /*tcp tx packet length high byte*/
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unsigned char tcp_rx_frame_len_L; /*tcp rx packet length low byte*/
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unsigned char tcp_rx_frame_len_H; /*tcp rx packet length high byte*/
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unsigned char rsvd050;
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unsigned char rsvd051;
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unsigned char rsvd052;
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unsigned char rsvd053;
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};
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struct fw_hdr {/*8-byte alinment required*/
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unsigned short signature;
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unsigned short version; /*0x8000 ~ 0x8FFF for FPGA version,
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*0x0000 ~ 0x7FFF for ASIC version,*/
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unsigned int dmem_size; /*define the size of boot loader*/
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unsigned int img_IMEM_size; /*define the size of FW in IMEM*/
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unsigned int img_SRAM_size; /*define the size of FW in SRAM*/
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unsigned int fw_priv_sz; /*define the size of DMEM variable*/
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unsigned short efuse_addr;
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unsigned short h2ccnd_resp_addr;
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unsigned int SVNRevision;
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unsigned int release_time; /*Mon:Day:Hr:Min*/
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struct fw_priv fwpriv;
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};
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struct hal_priv {
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/*Endpoint handles*/
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struct net_device *pipehdls_r8712[10];
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u8 (*hal_bus_init)(struct _adapter *adapter);
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};
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uint rtl8712_hal_init(struct _adapter *padapter);
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#endif
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