![Larry Finger](/assets/img/avatar_default.png)
This code is for a completely new version of the Realtek 8192 USB devices such as the D-Link DWA-130. The Realtek code, which was originally for Linux, Windows XP and Windows CE, has been stripped of all code not needed for Linux. In addition, only one additional configuration variable, which enables AP mode, remains. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com> Tested-by: Frederic Leroy <fredo@starox.org>
319 lines
9.4 KiB
C
319 lines
9.4 KiB
C
#ifndef __RTL871X_MP_H_
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#define __RTL871X_MP_H_
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/* 00 - Success */
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/* 11 - Error */
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#define STATUS_SUCCESS (0x00000000L)
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#define STATUS_PENDING (0x00000103L)
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#define STATUS_UNSUCCESSFUL (0xC0000001L)
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#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
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#define STATUS_NOT_SUPPORTED (0xC00000BBL)
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#define NDIS_STATUS_SUCCESS ((uint)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((uint) STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((uint)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((uint)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((uint)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((uint)0x00010007L)
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#define NDIS_STATUS_FAILURE ((uint) STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((uint)\
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STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((uint)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((uint)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((uint)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((uint)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((uint)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((uint)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((uint)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((uint)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((uint)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((uint)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((uint)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((uint)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((uint)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((uint)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((uint)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((uint)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((uint)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((uint)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((uint)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((uint)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((uint)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((uint)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((uint)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((uint)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((uint)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((uint)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((uint)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((uint)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((uint)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((uint)0xC001001FL)
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#define NDIS_STATUS_INVALID_SAP ((uint)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((uint)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((uint)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((uint)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((uint)0xC0010024L) /* cause 27*/
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((uint)0xC0010025L) /* 35,45*/
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((uint)0xC0010026L) /* 37*/
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#define NDIS_STATUS_INCOMPATABLE_QOS ((uint)0xC0010027L) /* 49*/
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((uint)0xC0010028L) /* 93*/
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((uint)0xC0010029L) /* 3*/
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#define MPT_NOOP 0
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#define MPT_READ_MAC_1BYTE 1
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#define MPT_READ_MAC_2BYTE 2
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#define MPT_READ_MAC_4BYTE 3
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#define MPT_WRITE_MAC_1BYTE 4
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#define MPT_WRITE_MAC_2BYTE 5
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#define MPT_WRITE_MAC_4BYTE 6
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#define MPT_READ_BB_CCK 7
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#define MPT_WRITE_BB_CCK 8
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#define MPT_READ_BB_OFDM 9
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#define MPT_WRITE_BB_OFDM 10
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#define MPT_READ_RF 11
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#define MPT_WRITE_RF 12
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#define MPT_READ_EEPROM_1BYTE 13
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#define MPT_WRITE_EEPROM_1BYTE 14
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#define MPT_READ_EEPROM_2BYTE 15
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#define MPT_WRITE_EEPROM_2BYTE 16
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#define MPT_SET_CSTHRESHOLD 21
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#define MPT_SET_INITGAIN 22
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#define MPT_SWITCH_BAND 23
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#define MPT_SWITCH_CHANNEL 24
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#define MPT_SET_DATARATE 25
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#define MPT_SWITCH_ANTENNA 26
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#define MPT_SET_TX_POWER 27
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#define MPT_SET_CONT_TX 28
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#define MPT_SET_SINGLE_CARRIER 29
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#define MPT_SET_CARRIER_SUPPRESSION 30
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#define MPT_GET_RATE_TABLE 31
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#define MPT_READ_TSSI 32
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#define MPT_GET_THERMAL_METER 33
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#define MAX_MP_XMITBUF_SZ 2048
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#define NR_MP_XMITFRAME 8
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struct mp_xmit_frame {
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struct list_head list;
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struct pkt_attrib attrib;
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_pkt *pkt;
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int frame_tag;
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struct _adapter *padapter;
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u8 *mem_addr;
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u16 sz[8];
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struct urb *pxmit_urb[8];
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u8 bpending[8];
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u8 last[8];
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uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
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};
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struct mp_wiparam {
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u32 bcompleted;
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u32 act_type;
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u32 io_offset;
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u32 io_value;
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};
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struct mp_priv {
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struct _adapter *papdater;
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/*OID cmd handler*/
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struct mp_wiparam workparam;
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u8 act_in_progress;
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/*Tx Section*/
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u8 TID;
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u32 tx_pktcount;
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/*Rx Section*/
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u32 rx_pktcount;
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u32 rx_crcerrpktcount;
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u32 rx_pktloss;
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struct recv_stat rxstat;
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/*RF/BB relative*/
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u32 curr_ch;
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u32 curr_rateidx;
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u8 curr_bandwidth;
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u8 curr_modem;
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u8 curr_txpoweridx;
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u32 curr_crystalcap;
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u16 antenna_tx;
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u16 antenna_rx;
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u8 curr_rfpath;
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u8 check_mp_pkt;
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uint ForcedDataRate;
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struct wlan_network mp_network;
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unsigned char network_macaddr[6];
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/*Testing Flag*/
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u32 mode;/*0 for normal type packet,
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* 1 for loopback packet (16bytes TXCMD)*/
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sint prev_fw_state;
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u8 *pallocated_mp_xmitframe_buf;
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u8 *pmp_xmtframe_buf;
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struct __queue free_mp_xmitqueue;
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u32 free_mp_xmitframe_cnt;
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};
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struct IOCMD_STRUCT {
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u8 cmdclass;
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u16 value;
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u8 index;
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};
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struct rf_reg_param {
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u32 path;
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u32 offset;
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u32 value;
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};
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struct bb_reg_param {
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u32 offset;
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u32 value;
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};
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/* ======================================================================= */
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#define LOWER true
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#define RAISE false
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#define IOCMD_CTRL_REG 0x10250370
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#define IOCMD_DATA_REG 0x10250374
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#define IOCMD_GET_THERMAL_METER 0xFD000028
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#define IOCMD_CLASS_BB_RF 0xF0
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#define IOCMD_BB_READ_IDX 0x00
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#define IOCMD_BB_WRITE_IDX 0x01
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#define IOCMD_RF_READ_IDX 0x02
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#define IOCMD_RF_WRIT_IDX 0x03
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#define BB_REG_BASE_ADDR 0x800
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#define RF_PATH_A 0
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#define RF_PATH_B 1
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#define RF_PATH_C 2
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#define RF_PATH_D 3
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#define MAX_RF_PATH_NUMS 2
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#define _2MAC_MODE_ 0
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#define _LOOPBOOK_MODE_ 1
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/* MP set force data rate base on the definition. */
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enum {
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/* CCK rate. */
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MPT_RATE_1M, /* 0 */
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MPT_RATE_2M,
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MPT_RATE_55M,
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MPT_RATE_11M, /* 3 */
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/* OFDM rate. */
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MPT_RATE_6M, /* 4 */
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MPT_RATE_9M,
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MPT_RATE_12M,
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MPT_RATE_18M,
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MPT_RATE_24M,
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MPT_RATE_36M,
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MPT_RATE_48M,
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MPT_RATE_54M, /* 11 */
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/* HT rate. */
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MPT_RATE_MCS0, /* 12 */
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MPT_RATE_MCS1,
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MPT_RATE_MCS2,
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MPT_RATE_MCS3,
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MPT_RATE_MCS4,
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MPT_RATE_MCS5,
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MPT_RATE_MCS6,
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MPT_RATE_MCS7, /* 19 */
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MPT_RATE_MCS8,
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MPT_RATE_MCS9,
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MPT_RATE_MCS10,
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MPT_RATE_MCS11,
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MPT_RATE_MCS12,
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MPT_RATE_MCS13,
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MPT_RATE_MCS14,
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MPT_RATE_MCS15, /* 27 */
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MPT_RATE_LAST
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};
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/* Represent Channel Width in HT Capabilities */
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enum HT_CHANNEL_WIDTH {
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HT_CHANNEL_WIDTH_20 = 0,
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HT_CHANNEL_WIDTH_40 = 1,
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};
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#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
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enum POWER_MODE {
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POWER_LOW = 0,
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POWER_NORMAL
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};
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#define RX_PKT_BROADCAST 1
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#define RX_PKT_DEST_ADDR 2
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#define RX_PKT_PHY_MATCH 3
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#define RPTMaxCount 0x000FFFFF;
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/* parameter 1 : BitMask
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* bit 0 : OFDM PPDU
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* bit 1 : OFDM False Alarm
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* bit 2 : OFDM MPDU OK
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* bit 3 : OFDM MPDU Fail
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* bit 4 : CCK PPDU
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* bit 5 : CCK False Alarm
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* bit 6 : CCK MPDU ok
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* bit 7 : CCK MPDU fail
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* bit 8 : HT PPDU counter
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* bit 9 : HT false alarm
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* bit 10 : HT MPDU total
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* bit 11 : HT MPDU OK
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* bit 12 : HT MPDU fail
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* bit 15 : RX full drop
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*/
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enum RXPHY_BITMASK {
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OFDM_PPDU_BIT = 0,
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OFDM_MPDU_OK_BIT,
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OFDM_MPDU_FAIL_BIT,
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CCK_PPDU_BIT,
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CCK_MPDU_OK_BIT,
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CCK_MPDU_FAIL_BIT,
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HT_PPDU_BIT,
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HT_MPDU_BIT,
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HT_MPDU_OK_BIT,
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HT_MPDU_FAIL_BIT,
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};
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enum ENCRY_CTRL_STATE {
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HW_CONTROL, /*hw encryption& decryption*/
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SW_CONTROL, /*sw encryption& decryption*/
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HW_ENCRY_SW_DECRY, /*hw encryption & sw decryption*/
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SW_ENCRY_HW_DECRY /*sw encryption & hw decryption*/
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};
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/* Bandwidth Offset */
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#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define HAL_PRIME_CHNL_OFFSET_UPPER 2
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/*=======================================================================*/
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void mp871xinit(struct _adapter *padapter);
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void mp871xdeinit(struct _adapter *padapter);
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u32 r8712_bb_reg_read(struct _adapter *Adapter, u16 offset);
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u8 r8712_bb_reg_write(struct _adapter *Adapter, u16 offset, u32 value);
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u32 r8712_rf_reg_read(struct _adapter *Adapter, u8 path, u8 offset);
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u8 r8712_rf_reg_write(struct _adapter *Adapter, u8 path,
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u8 offset, u32 value);
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u32 r8712_get_bb_reg(struct _adapter *Adapter, u16 offset, u32 bitmask);
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u8 r8712_set_bb_reg(struct _adapter *Adapter, u16 offset,
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u32 bitmask, u32 value);
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u32 r8712_get_rf_reg(struct _adapter *Adapter, u8 path, u8 offset,
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u32 bitmask);
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u8 r8712_set_rf_reg(struct _adapter *Adapter, u8 path, u8 offset,
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u32 bitmask, u32 value);
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void r8712_SetChannel(struct _adapter *pAdapter);
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void r8712_SetTxPower(struct _adapter *pAdapte);
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void r8712_SetTxAGCOffset(struct _adapter *pAdapter, u32 ulTxAGCOffset);
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void r8712_SetDataRate(struct _adapter *pAdapter);
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void r8712_SwitchBandwidth(struct _adapter *pAdapter);
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void r8712_SwitchAntenna(struct _adapter *pAdapter);
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void r8712_SetCrystalCap(struct _adapter *pAdapter);
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void r8712_GetThermalMeter(struct _adapter *pAdapter, u32 *value);
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void r8712_SetContinuousTx(struct _adapter *pAdapter, u8 bStart);
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void r8712_SetSingleCarrierTx(struct _adapter *pAdapter, u8 bStart);
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void r8712_SetSingleToneTx(struct _adapter *pAdapter, u8 bStart);
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void r8712_SetCarrierSuppressionTx(struct _adapter *pAdapter, u8 bStart);
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void r8712_ResetPhyRxPktCount(struct _adapter *pAdapter);
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u32 r8712_GetPhyRxPktReceived(struct _adapter *pAdapter);
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u32 r8712_GetPhyRxPktCRC32Error(struct _adapter *pAdapter);
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#endif /*__RTL871X_MP_H_*/
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