b3a5af435a
This is the usual large batch of DT updates. Lots and lots of smaller changes, some of the larger ones to point out are: - Rockchip veyron (Chromebook) support, as well as several other new boards - DRM support on Atmel AT91SAM9N12EK - USB additions on some Allwinner platforms - Mediatek MT6580 support - Freescale i.MX6UL support - Cleanups for Renesas shmobile platforms - Lots of added devices on LPC18xx - Lots of added devices and boards on UniPhier There's also some dependent code added here, in particular some branches that are primarily merged through the clock tree. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJV5OMWAAoJEIwa5zzehBx3r2QP/1skn0zzgfvbK0kkPOh9q3Jk jX1elN4Wde1SnScz8UbdVb9nmdbhxsuYE/3+Lz7yCndWScBiak4qcsNHrSRhh3FA ST7Ub8DLc2TxY9K7eDkyVCcNkP35+UQTHCN76R5Lgrlfw3UO9Zr3xPFX3+Kd6aWz 9X8UnvJacQQIN/vO6J02kB96sKPEIANfuMgO6vDSbmcZ1RrdlHzjoRwAV0smECtJ NyOh+NQdPBR0gSl/peyKzAXoDHNXpDotltTmIz3tPA+dYBO/qG//B73H/oqox0ql AKAktyaDzdxXEuixPtAroo4dDy3xuIQ6xU+DNhPWQq0BgaxHWqkwq60d74ot8vCz 8gvC8pwA6gavbqVFNePOnwPNSyWZX01scX4fp903NjVM8/rGPvCR4y6p8lFIyVkG P0L8rmY/UYq3fieaAb1W0odASDrQpgg3zsHD7to43hz6jaRnMRCpA8nTVqJcyHqI E6YfGQH87Kpbvkjo0FYqo5P6xCCRTq+QUys6JruNYg05R/gd8AG7cXaVNO3yvg3T lRwNXDBt/zcp2exKnGR0IdGMUMICzsuoB8ZePkQdIWwePrd4AzT5qYJe/txmg1rd q+9VJqQkeF+txLd9XUV2W/Hcuzu3ZPCbs97I9tTKQHMGwKUZaPfuk2r4+4K+Ps5a dYwdms39p6AIT43rK+m3 =D2Pm -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Ladies and gentlemen, we proudly announce to you the latest branch of ARM device tree contents for the mainline kernel. Come and see, come and see! No less than twentythree thousand lines of additions! Just imagine the joy you will have of using your mainline kernel on newly supported hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or UniPhier hardware! For those of you feeling less adventurous, added hardware support on platforms such as TI DM814x and Gumstix Overo platforms might be more of your liking. We've got something for everyone here! Ahem. Cough. So, anyway... This is the usual large batch of DT updates. Lots and lots of smaller changes, some of the larger ones to point out are: - Rockchip veyron (Chromebook) support, as well as several other new boards - DRM support on Atmel AT91SAM9N12EK - USB additions on some Allwinner platforms - Mediatek MT6580 support - Freescale i.MX6UL support - cleanups for Renesas shmobile platforms - lots of added devices on LPC18xx - lots of added devices and boards on UniPhier There's also some dependent code added here, in particular some branches that are primarily merged through the clock tree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits) ARM: tegra: Add gpio-ranges property ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114 ARM: tegra: Add Tegra124 PMU support ARM: tegra: jetson-tk1: Add GK20A GPU DT node ARM: tegra: venice2: Add GK20A GPU DT node ARM: tegra: Add IOMMU node to GK20A ARM: tegra: Add CPU regulator to the Jetson TK1 device tree ARM: tegra: Add entries for cpufreq on Tegra124 ARM: tegra: Enable the DFLL on the Jetson TK1 ARM: tegra: Add the DFLL to Tegra124 device tree ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller. ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes ARM: dts: rockchip: correct regulator power states for suspend ARM: dts: rockchip: correct regulator PM properties ARM: dts: vexpress: Use assigned-clock-parents for sp810 pinctrl: tegra: Only set the gpio range if needed arm: boot: dts: am4372: add ARM timers and SCU nodes ARM: dts: AM4372: Add the am4372-rtc compatible string ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain ...
699 lines
16 KiB
Plaintext
699 lines
16 KiB
Plaintext
/*
|
|
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
/dts-v1/;
|
|
|
|
#include "dra74x.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
|
/ {
|
|
model = "TI AM5728 BeagleBoard-X15";
|
|
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
|
|
|
aliases {
|
|
rtc0 = &mcp_rtc;
|
|
rtc1 = &tps659038_rtc;
|
|
rtc2 = &rtc;
|
|
display0 = &hdmi0;
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x80000000>;
|
|
};
|
|
|
|
vdd_3v3: fixedregulator-vdd_3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_3v3";
|
|
vin-supply = <®en1>;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
vtt_fixed: fixedregulator-vtt {
|
|
/* TPS51200 */
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vtt_fixed";
|
|
vin-supply = <&smps3_reg>;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
enable-active-high;
|
|
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&leds_pins_default>;
|
|
|
|
led@0 {
|
|
label = "beagle-x15:usr0";
|
|
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "heartbeat";
|
|
default-state = "off";
|
|
};
|
|
|
|
led@1 {
|
|
label = "beagle-x15:usr1";
|
|
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "cpu0";
|
|
default-state = "off";
|
|
};
|
|
|
|
led@2 {
|
|
label = "beagle-x15:usr2";
|
|
gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "mmc0";
|
|
default-state = "off";
|
|
};
|
|
|
|
led@3 {
|
|
label = "beagle-x15:usr3";
|
|
gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "ide-disk";
|
|
default-state = "off";
|
|
};
|
|
};
|
|
|
|
gpio_fan: gpio_fan {
|
|
/* Based on 5v 500mA AFB02505HHB */
|
|
compatible = "gpio-fan";
|
|
gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
|
|
gpio-fan,speed-map = <0 0>,
|
|
<13000 1>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
extcon_usb1: extcon_usb1 {
|
|
compatible = "linux,extcon-usb-gpio";
|
|
id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&extcon_usb1_pins>;
|
|
};
|
|
|
|
extcon_usb2: extcon_usb2 {
|
|
compatible = "linux,extcon-usb-gpio";
|
|
id-gpio = <&gpio7 24 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&extcon_usb2_pins>;
|
|
};
|
|
|
|
hdmi0: connector {
|
|
compatible = "hdmi-connector";
|
|
label = "hdmi";
|
|
|
|
type = "a";
|
|
|
|
port {
|
|
hdmi_connector_in: endpoint {
|
|
remote-endpoint = <&tpd12s015_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
tpd12s015: encoder {
|
|
compatible = "ti,tpd12s015";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tpd12s015_pins>;
|
|
|
|
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
|
|
<&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
|
|
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
tpd12s015_in: endpoint {
|
|
remote-endpoint = <&hdmi_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
tpd12s015_out: endpoint {
|
|
remote-endpoint = <&hdmi_connector_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dra7_pmx_core {
|
|
leds_pins_default: leds_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
|
|
0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
|
|
0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
|
|
0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
|
|
>;
|
|
};
|
|
|
|
i2c1_pins_default: i2c1_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
|
0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
|
>;
|
|
};
|
|
|
|
hdmi_pins: pinmux_hdmi_pins {
|
|
pinctrl-single,pins = <
|
|
0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
|
0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
|
>;
|
|
};
|
|
|
|
i2c3_pins_default: i2c3_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
|
0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
|
>;
|
|
};
|
|
|
|
uart3_pins_default: uart3_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
|
0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
|
>;
|
|
};
|
|
|
|
mmc1_pins_default: mmc1_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
|
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
|
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
|
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
|
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
|
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
|
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
|
>;
|
|
};
|
|
|
|
mmc2_pins_default: mmc2_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
|
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
|
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
|
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
|
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
|
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
|
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
|
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
|
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
|
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
|
>;
|
|
};
|
|
|
|
cpsw_pins_default: cpsw_pins_default {
|
|
pinctrl-single,pins = <
|
|
/* Slave 1 */
|
|
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
|
|
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
|
|
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
|
|
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
|
|
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
|
|
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
|
|
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
|
|
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
|
|
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
|
|
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
|
|
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
|
|
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
|
|
|
|
/* Slave 2 */
|
|
0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
|
|
0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
|
|
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
|
|
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
|
|
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
|
|
0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
|
|
0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
|
0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
|
0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
|
0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
|
0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
|
0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
|
>;
|
|
|
|
};
|
|
|
|
cpsw_pins_sleep: cpsw_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
/* Slave 1 */
|
|
0x250 (PIN_INPUT | MUX_MODE15)
|
|
0x254 (PIN_INPUT | MUX_MODE15)
|
|
0x258 (PIN_INPUT | MUX_MODE15)
|
|
0x25c (PIN_INPUT | MUX_MODE15)
|
|
0x260 (PIN_INPUT | MUX_MODE15)
|
|
0x264 (PIN_INPUT | MUX_MODE15)
|
|
0x268 (PIN_INPUT | MUX_MODE15)
|
|
0x26c (PIN_INPUT | MUX_MODE15)
|
|
0x270 (PIN_INPUT | MUX_MODE15)
|
|
0x274 (PIN_INPUT | MUX_MODE15)
|
|
0x278 (PIN_INPUT | MUX_MODE15)
|
|
0x27c (PIN_INPUT | MUX_MODE15)
|
|
|
|
/* Slave 2 */
|
|
0x198 (PIN_INPUT | MUX_MODE15)
|
|
0x19c (PIN_INPUT | MUX_MODE15)
|
|
0x1a0 (PIN_INPUT | MUX_MODE15)
|
|
0x1a4 (PIN_INPUT | MUX_MODE15)
|
|
0x1a8 (PIN_INPUT | MUX_MODE15)
|
|
0x1ac (PIN_INPUT | MUX_MODE15)
|
|
0x1b0 (PIN_INPUT | MUX_MODE15)
|
|
0x1b4 (PIN_INPUT | MUX_MODE15)
|
|
0x1b8 (PIN_INPUT | MUX_MODE15)
|
|
0x1bc (PIN_INPUT | MUX_MODE15)
|
|
0x1c0 (PIN_INPUT | MUX_MODE15)
|
|
0x1c4 (PIN_INPUT | MUX_MODE15)
|
|
>;
|
|
};
|
|
|
|
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
|
pinctrl-single,pins = <
|
|
/* MDIO */
|
|
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
|
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
|
>;
|
|
};
|
|
|
|
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
0x23c (PIN_INPUT | MUX_MODE15)
|
|
0x240 (PIN_INPUT | MUX_MODE15)
|
|
>;
|
|
};
|
|
|
|
tps659038_pins_default: tps659038_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
|
>;
|
|
};
|
|
|
|
tmp102_pins_default: tmp102_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
|
>;
|
|
};
|
|
|
|
mcp79410_pins_default: mcp79410_pins_default {
|
|
pinctrl-single,pins = <
|
|
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
|
>;
|
|
};
|
|
|
|
usb1_pins: pinmux_usb1_pins {
|
|
pinctrl-single,pins = <
|
|
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
|
>;
|
|
};
|
|
|
|
extcon_usb1_pins: extcon_usb1_pins {
|
|
pinctrl-single,pins = <
|
|
0x3ec (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
|
|
>;
|
|
};
|
|
|
|
extcon_usb2_pins: extcon_usb2_pins {
|
|
pinctrl-single,pins = <
|
|
0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
|
|
>;
|
|
};
|
|
|
|
tpd12s015_pins: pinmux_tpd12s015_pins {
|
|
pinctrl-single,pins = <
|
|
0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
|
0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
|
0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
tps659038: tps659038@58 {
|
|
compatible = "ti,tps659038";
|
|
reg = <0x58>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tps659038_pins_default>;
|
|
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
|
|
ti,system-power-controller;
|
|
|
|
tps659038_pmic {
|
|
compatible = "ti,tps659038-pmic";
|
|
|
|
regulators {
|
|
smps12_reg: smps12 {
|
|
/* VDD_MPU */
|
|
regulator-name = "smps12";
|
|
regulator-min-microvolt = < 850000>;
|
|
regulator-max-microvolt = <1250000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps3_reg: smps3 {
|
|
/* VDD_DDR */
|
|
regulator-name = "smps3";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps45_reg: smps45 {
|
|
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
|
|
regulator-name = "smps45";
|
|
regulator-min-microvolt = < 850000>;
|
|
regulator-max-microvolt = <1150000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
smps6_reg: smps6 {
|
|
/* VDD_CORE */
|
|
regulator-name = "smps6";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1030000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* SMPS7 unused */
|
|
|
|
smps8_reg: smps8 {
|
|
/* VDD_1V8 */
|
|
regulator-name = "smps8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* SMPS9 unused */
|
|
|
|
ldo1_reg: ldo1 {
|
|
/* VDD_SD */
|
|
regulator-name = "ldo1";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo2_reg: ldo2 {
|
|
/* VDD_SHV5 */
|
|
regulator-name = "ldo2";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo3_reg: ldo3 {
|
|
/* VDDA_1V8_PHY */
|
|
regulator-name = "ldo3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo9_reg: ldo9 {
|
|
/* VDD_RTC */
|
|
regulator-name = "ldo9";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldoln_reg: ldoln {
|
|
/* VDDA_1V8_PLL */
|
|
regulator-name = "ldoln";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldousb_reg: ldousb {
|
|
/* VDDA_3V_USB: VDDA_USBHS33 */
|
|
regulator-name = "ldousb";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
regen1: regen1 {
|
|
/* VDD_3V3_ON */
|
|
regulator-name = "regen1";
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
tps659038_rtc: tps659038_rtc {
|
|
compatible = "ti,palmas-rtc";
|
|
interrupt-parent = <&tps659038>;
|
|
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
|
wakeup-source;
|
|
};
|
|
|
|
tps659038_pwr_button: tps659038_pwr_button {
|
|
compatible = "ti,palmas-pwrbutton";
|
|
interrupt-parent = <&tps659038>;
|
|
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
|
wakeup-source;
|
|
ti,palmas-long-press-seconds = <12>;
|
|
};
|
|
|
|
tps659038_gpio: tps659038_gpio {
|
|
compatible = "ti,palmas-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
};
|
|
|
|
tmp102: tmp102@48 {
|
|
compatible = "ti,tmp102";
|
|
reg = <0x48>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tmp102_pins_default>;
|
|
interrupt-parent = <&gpio7>;
|
|
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
|
#thermal-sensor-cells = <1>;
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c3_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
mcp_rtc: rtc@6f {
|
|
compatible = "microchip,mcp7941x";
|
|
reg = <0x6f>;
|
|
interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>; /* IRQ_SYS_1N */
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcp79410_pins_default>;
|
|
|
|
vcc-supply = <&vdd_3v3>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
&gpio7 {
|
|
ti,no-reset-on-init;
|
|
ti,no-idle-on-init;
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu0-supply = <&smps12_reg>;
|
|
voltage-tolerance = <1>;
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
|
<&dra7_pmx_core 0x3f8>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins_default>;
|
|
};
|
|
|
|
&mac {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_pins_default>;
|
|
pinctrl-1 = <&cpsw_pins_sleep>;
|
|
dual_emac;
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy_id = <&davinci_mdio>, <1>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy_id = <&davinci_mdio>, <2>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <2>;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_pins_default>;
|
|
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
|
|
vmmc-supply = <&ldo1_reg>;
|
|
vmmc_aux-supply = <&vdd_3v3>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
|
};
|
|
|
|
&mmc2 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
|
|
|
vmmc-supply = <&vdd_3v3>;
|
|
bus-width = <8>;
|
|
ti,non-removable;
|
|
cap-mmc-dual-data-rate;
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
phy-supply = <&ldousb_reg>;
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "host";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usb1_pins>;
|
|
};
|
|
|
|
&omap_dwc3_1 {
|
|
extcon = <&extcon_usb1>;
|
|
};
|
|
|
|
&omap_dwc3_2 {
|
|
extcon = <&extcon_usb2>;
|
|
};
|
|
|
|
&usb2 {
|
|
dr_mode = "peripheral";
|
|
};
|
|
|
|
&cpu_trips {
|
|
cpu_alert1: cpu_alert1 {
|
|
temperature = <50000>; /* millicelsius */
|
|
hysteresis = <2000>; /* millicelsius */
|
|
type = "active";
|
|
};
|
|
};
|
|
|
|
&cpu_cooling_maps {
|
|
map1 {
|
|
trip = <&cpu_alert1>;
|
|
cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
&thermal_zones {
|
|
board_thermal: board_thermal {
|
|
polling-delay-passive = <1250>; /* milliseconds */
|
|
polling-delay = <1500>; /* milliseconds */
|
|
|
|
/* sensor ID */
|
|
thermal-sensors = <&tmp102 0>;
|
|
|
|
board_trips: trips {
|
|
board_alert0: board_alert {
|
|
temperature = <40000>; /* millicelsius */
|
|
hysteresis = <2000>; /* millicelsius */
|
|
type = "active";
|
|
};
|
|
|
|
board_crit: board_crit {
|
|
temperature = <105000>; /* millicelsius */
|
|
hysteresis = <0>; /* millicelsius */
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
board_cooling_maps: cooling-maps {
|
|
map0 {
|
|
trip = <&board_alert0>;
|
|
cooling-device =
|
|
<&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dss {
|
|
status = "ok";
|
|
|
|
vdda_video-supply = <&ldoln_reg>;
|
|
};
|
|
|
|
&hdmi {
|
|
status = "ok";
|
|
vdda-supply = <&ldo3_reg>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&hdmi_pins>;
|
|
|
|
port {
|
|
hdmi_out: endpoint {
|
|
remote-endpoint = <&tpd12s015_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
|
};
|