9cfad9bc47
* cleanup-clk-h-includes: (62 commits) clk: Remove clk.h from clk-provider.h clk: h8300: Remove clk.h and clkdev.h includes clk: at91: Include clk.h and slab.h clk: ti: Switch clk-provider.h include to clk.h clk: pistachio: Include clk.h clk: ingenic: Include clk.h clk: si570: Include clk.h clk: moxart: Include clk.h clk: cdce925: Include clk.h clk: Include clk.h in clk.c clk: zynq: Include clk.h clk: ti: Include clk.h clk: sunxi: Include clk.h and remove unused clkdev.h includes clk: st: Include clk.h clk: qcom: Include clk.h clk: highbank: Include clk.h clk: bcm: Include clk.h clk: versatile: Remove clk.h and clkdev.h includes clk: ux500: Remove clk.h and clkdev.h includes clk: tegra: Properly include clk.h ...
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
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* H8/300 divide clock driver
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*
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* Copyright 2015 Yoshinori Sato <ysato@users.sourceforge.jp>
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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static DEFINE_SPINLOCK(clklock);
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static void __init h8300_div_clk_setup(struct device_node *node)
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{
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int num_parents;
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struct clk *clk;
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const char *clk_name = node->name;
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const char *parent_name;
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void __iomem *divcr = NULL;
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int width;
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num_parents = of_clk_get_parent_count(node);
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if (num_parents < 1) {
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pr_err("%s: no parent found", clk_name);
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return;
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}
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divcr = of_iomap(node, 0);
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if (divcr == NULL) {
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pr_err("%s: failed to map divide register", clk_name);
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goto error;
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}
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parent_name = of_clk_get_parent_name(node, 0);
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of_property_read_u32(node, "renesas,width", &width);
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clk = clk_register_divider(NULL, clk_name, parent_name,
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CLK_SET_RATE_GATE, divcr, 0, width,
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CLK_DIVIDER_POWER_OF_TWO, &clklock);
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if (!IS_ERR(clk)) {
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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return;
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}
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pr_err("%s: failed to register %s div clock (%ld)\n",
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__func__, clk_name, PTR_ERR(clk));
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error:
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if (divcr)
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iounmap(divcr);
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}
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CLK_OF_DECLARE(h8300_div_clk, "renesas,h8300-div-clock", h8300_div_clk_setup);
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