![Linus Torvalds](/assets/img/avatar_default.png)
- Hugepage support - "Image" header support for RISC-V kernel binaries, compatible with the current ARM64 "Image" header - Initial page table setup now split into two stages - CONFIG_SOC support (starting with SiFive SoCs) - Avoid reserving memory between RAM start and the kernel in setup_bootmem() - Enable high-res timers and dynamic tick in the RV64 defconfig - Remove long-deprecated gate area stubs - MAINTAINERS updates to switch to the newly-created shared RISC-V git tree, and to fix a get_maintainers.pl issue for patches involving SiFive E-mail addresses Also, one integration fix to resolve a build problem introduced during in the v5.3-rc1 merge window: - Fix build break after macro-to-function conversion in asm-generic/cacheflush.h -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl0wwmkACgkQx4+xDQu9 KkvM0A//W641P2vQm/GBkPiqecAoYhRdGGXO7En3UiOSMe6qoDvhX9p09OtgGWa9 0XyEdj0RQK4UuE07EnHsaIAynYdbv/er1cskkdGRhs28FdJTP2z3OrfnjcRBPQtP mP1d4fwm+n0DTx+BzxihNu+CRSClqVSl58ruaGiN6ZttEuJsVyjM32OPQfQapxxW TWl1oHugXmWLg0QIB+fjNLY9om143di6pRJeBWAQRSDzjA1x+lkVxPy6pqUK3Hjb F/kio+0ornReAwoY8n9WXPijUQ/bK6uY5gj2XpCpbEVbfaWjlh/a9hN8OveDLzFP F2l9bdKaR9/w0B7tplE7MllVI91S3gJ/UscZJQNmVStjY9iI4gphT5Hji6eR5RH4 j15piAR9fY91iXH9XfJYIs69J1oYsaeDBUji8Sy7IdHwQwjdUjncVSF7IUakA6UJ okE1mq14ErZK+E2nl9OJvE89pep0R9GZDQ1kCFKQSw979CfnINDmfr5TsuiRdTU4 mdeYmSu+l6szknLRL/bzMATAAmx6KXAO409scs8KD/xNxOylWkeZ+P47MYpEsV56 G6d3GVZO5r+YafZYjF4aDHATI1Sh/aFPUHRrdqWSAlLJfAIMImV9Vf2UJhotzcTR XDWLZLqFqXB/Vl1xgkmtDAKdEEfu3iL9M9J6szYZdtI9fSiRWl4= =SVSp -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: - Hugepage support - "Image" header support for RISC-V kernel binaries, compatible with the current ARM64 "Image" header - Initial page table setup now split into two stages - CONFIG_SOC support (starting with SiFive SoCs) - Avoid reserving memory between RAM start and the kernel in setup_bootmem() - Enable high-res timers and dynamic tick in the RV64 defconfig - Remove long-deprecated gate area stubs - MAINTAINERS updates to switch to the newly-created shared RISC-V git tree, and to fix a get_maintainers.pl issue for patches involving SiFive E-mail addresses Also, one integration fix to resolve a build problem introduced during in the v5.3-rc1 merge window: - Fix build break after macro-to-function conversion in asm-generic/cacheflush.h * tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: fix build break after macro-to-function conversion in generic cacheflush.h RISC-V: Add an Image header that boot loader can parse. RISC-V: Setup initial page tables in two stages riscv: remove free_initrd_mem riscv: ccache: Remove unused variable riscv: Introduce huge page support for 32/64bit kernel x86, arm64: Move ARCH_WANT_HUGE_PMD_SHARE config in arch/Kconfig RISC-V: Fix memory reservation in setup_bootmem() riscv: defconfig: enable SOC_SIFIVE riscv: select SiFive platform drivers with SOC_SIFIVE arch: riscv: add config option for building SiFive's SoC resource riscv: Remove gate area stubs MAINTAINERS: change the arch/riscv git tree to the new shared tree MAINTAINERS: don't automatically patches involving SiFive to the linux-riscv list RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
292 lines
6.6 KiB
Plaintext
292 lines
6.6 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.rst.
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#
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config 64BIT
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bool
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config 32BIT
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bool
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config RISCV
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def_bool y
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# even on 32-bit, physical (and DMA) addresses are > 32-bits
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select PHYS_ADDR_T_64BIT
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select OF
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select OF_EARLY_FLATTREE
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select OF_IRQ
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select ARCH_HAS_BINFMT_FLAT
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select ARCH_WANT_FRAME_POINTERS
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select CLONE_BACKWARDS
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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select GENERIC_IRQ_SHOW
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_ATOMIC64 if !64BIT
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_MEMBLOCK_NODE_MAP
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select HAVE_DMA_CONTIGUOUS
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select HAVE_FUTEX_CMPXCHG if FUTEX
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select HAVE_PERF_EVENTS
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_DOMAIN
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select SPARSE_IRQ
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select SYSCTL_EXCEPTION_TRACE
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select HAVE_ARCH_TRACEHOOK
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select HAVE_PCI
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select MODULES_USE_ELF_RELA if MODULES
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select MODULE_SECTIONS if MODULES
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select THREAD_INFO_IN_TASK
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select PCI_DOMAINS_GENERIC if PCI
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select PCI_MSI if PCI
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select RISCV_TIMER
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select GENERIC_IRQ_MULTI_HANDLER
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_MMIOWB
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select HAVE_EBPF_JIT if 64BIT
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select EDAC_SUPPORT
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select ARCH_HAS_GIGANTIC_PAGE
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select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
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config MMU
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def_bool y
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config ZONE_DMA32
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bool
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default y if 64BIT
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config PAGE_OFFSET
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hex
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default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
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default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
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default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
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config ARCH_WANT_GENERAL_HUGETLB
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def_bool y
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config SYS_SUPPORTS_HUGETLBFS
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def_bool y
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config STACKTRACE_SUPPORT
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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config GENERIC_BUG
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def_bool y
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depends on BUG
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select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
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config GENERIC_BUG_RELATIVE_POINTERS
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bool
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config FIX_EARLYCON_MEM
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def_bool y
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config PGTABLE_LEVELS
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int
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default 3 if 64BIT
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default 2
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source "arch/riscv/Kconfig.socs"
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menu "Platform type"
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choice
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prompt "Base ISA"
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default ARCH_RV64I
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help
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This selects the base ISA that this kernel will target and must match
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the target platform.
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config ARCH_RV32I
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bool "RV32I"
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select 32BIT
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select GENERIC_LIB_ASHLDI3
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select GENERIC_LIB_ASHRDI3
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select GENERIC_LIB_LSHRDI3
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select GENERIC_LIB_UCMPDI2
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config ARCH_RV64I
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bool "RV64I"
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select 64BIT
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select ARCH_SUPPORTS_INT128 if GCC_VERSION >= 50000
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_DYNAMIC_FTRACE
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select HAVE_DYNAMIC_FTRACE_WITH_REGS
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select SWIOTLB
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endchoice
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# We must be able to map all physical memory into the kernel, but the compiler
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# is still a bit more efficient when generating code if it's setup in a manner
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# such that it can only map 2GiB of memory.
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choice
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prompt "Kernel Code Model"
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default CMODEL_MEDLOW if 32BIT
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default CMODEL_MEDANY if 64BIT
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config CMODEL_MEDLOW
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bool "medium low code model"
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config CMODEL_MEDANY
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bool "medium any code model"
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endchoice
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config MODULE_SECTIONS
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bool
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select HAVE_MOD_ARCH_SPECIFIC
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choice
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prompt "Maximum Physical Memory"
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default MAXPHYSMEM_2GB if 32BIT
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default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW
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default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
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config MAXPHYSMEM_2GB
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bool "2GiB"
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config MAXPHYSMEM_128GB
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depends on 64BIT && CMODEL_MEDANY
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bool "128GiB"
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endchoice
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config SMP
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bool "Symmetric Multi-Processing"
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help
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This enables support for systems with more than one CPU. If
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you say N here, the kernel will run on single and
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multiprocessor machines, but will use only one CPU of a
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multiprocessor machine. If you say Y here, the kernel will run
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on many, but not all, single processor machines. On a single
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processor machine, the kernel will run faster if you say N
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here.
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If you don't know what to do here, say N.
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config NR_CPUS
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int "Maximum number of CPUs (2-32)"
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range 2 32
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depends on SMP
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default "8"
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choice
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prompt "CPU Tuning"
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default TUNE_GENERIC
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config TUNE_GENERIC
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bool "generic"
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endchoice
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config RISCV_ISA_C
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bool "Emit compressed instructions when building Linux"
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default y
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help
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Adds "C" to the ISA subsets that the toolchain is allowed to emit
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when building Linux, which results in compressed instructions in the
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Linux binary.
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If you don't know what to do here, say Y.
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menu "supported PMU type"
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depends on PERF_EVENTS
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config RISCV_BASE_PMU
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bool "Base Performance Monitoring Unit"
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def_bool y
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help
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A base PMU that serves as a reference implementation and has limited
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feature of perf. It can run on any RISC-V machines so serves as the
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fallback, but this option can also be disable to reduce kernel size.
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endmenu
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config FPU
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bool "FPU support"
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default y
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help
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Say N here if you want to disable all floating-point related procedure
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in the kernel.
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If you don't know what to do here, say Y.
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endmenu
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menu "Kernel features"
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source "kernel/Kconfig.hz"
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endmenu
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menu "Boot options"
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config CMDLINE
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string "Built-in kernel command line"
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help
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For most platforms, the arguments for the kernel's command line
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are provided at run-time, during boot. However, there are cases
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where either no arguments are being provided or the provided
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arguments are insufficient or even invalid.
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When that occurs, it is possible to define a built-in command
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line here and choose how the kernel should use it later on.
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choice
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prompt "Built-in command line usage" if CMDLINE != ""
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default CMDLINE_FALLBACK
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help
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Choose how the kernel will handle the provided built-in command
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line.
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config CMDLINE_FALLBACK
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bool "Use bootloader kernel arguments if available"
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help
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Use the built-in command line as fallback in case we get nothing
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during boot. This is the default behaviour.
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config CMDLINE_EXTEND
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bool "Extend bootloader kernel arguments"
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help
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The command-line arguments provided during boot will be
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appended to the built-in command line. This is useful in
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cases where the provided arguments are insufficient and
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you don't want to or cannot modify them.
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config CMDLINE_FORCE
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bool "Always use the default kernel command string"
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help
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Always use the built-in command line, even if we get one during
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boot. This is useful in case you need to override the provided
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command line on systems where you don't have or want control
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over it.
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endchoice
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endmenu
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menu "Power management options"
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source "kernel/power/Kconfig"
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endmenu
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