8fbbfd966e
This adds support for the mailbox via which the kernel can communicate with the firmware running on the secure processor of the Armada 37xx SOC. The rWTM secure processor has access to internal eFuses and cryptographic circuits, such as the Entropy Bit Generator to generate true random numbers. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
24 lines
432 B
C
24 lines
432 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* rWTM BIU Mailbox driver for Armada 37xx
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*
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* Author: Marek Behun <marek.behun@nic.cz>
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*/
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#ifndef _LINUX_ARMADA_37XX_RWTM_MAILBOX_H_
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#define _LINUX_ARMADA_37XX_RWTM_MAILBOX_H_
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#include <linux/types.h>
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struct armada_37xx_rwtm_tx_msg {
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u16 command;
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u32 args[16];
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};
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struct armada_37xx_rwtm_rx_msg {
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u32 retval;
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u32 status[16];
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};
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#endif /* _LINUX_ARMADA_37XX_RWTM_MAILBOX_H_ */
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