77f8d9b7e6
Here we add the necessary device nodes required for successful device probing and Pinctrl setup for the FSM when booting on an STiH416 (Orly2). Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by Angus Clark <angus.clark@st.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
229 lines
5.7 KiB
Plaintext
229 lines
5.7 KiB
Plaintext
/*
|
|
* Copyright (C) 2012 STMicroelectronics Limited.
|
|
* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* publishhed by the Free Software Foundation.
|
|
*/
|
|
#include "stih41x.dtsi"
|
|
#include "stih416-clock.dtsi"
|
|
#include "stih416-pinctrl.dtsi"
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/reset-controller/stih416-resets.h>
|
|
/ {
|
|
L2: cache-controller {
|
|
compatible = "arm,pl310-cache";
|
|
reg = <0xfffe2000 0x1000>;
|
|
arm,data-latency = <3 3 3>;
|
|
arm,tag-latency = <2 2 2>;
|
|
cache-unified;
|
|
cache-level = <2>;
|
|
};
|
|
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
ranges;
|
|
compatible = "simple-bus";
|
|
|
|
powerdown: powerdown-controller {
|
|
#reset-cells = <1>;
|
|
compatible = "st,stih416-powerdown";
|
|
};
|
|
|
|
softreset: softreset-controller {
|
|
#reset-cells = <1>;
|
|
compatible = "st,stih416-softreset";
|
|
};
|
|
|
|
syscfg_sbc:sbc-syscfg@fe600000{
|
|
compatible = "st,stih416-sbc-syscfg", "syscon";
|
|
reg = <0xfe600000 0x1000>;
|
|
};
|
|
|
|
syscfg_front:front-syscfg@fee10000{
|
|
compatible = "st,stih416-front-syscfg", "syscon";
|
|
reg = <0xfee10000 0x1000>;
|
|
};
|
|
|
|
syscfg_rear:rear-syscfg@fe830000{
|
|
compatible = "st,stih416-rear-syscfg", "syscon";
|
|
reg = <0xfe830000 0x1000>;
|
|
};
|
|
|
|
/* MPE */
|
|
syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
|
|
compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
|
|
reg = <0xfddf0000 0x1000>;
|
|
};
|
|
|
|
syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
|
|
compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
|
|
reg = <0xfd6a0000 0x1000>;
|
|
};
|
|
|
|
syscfg_cpu:cpu-syscfg@fdde0000{
|
|
compatible = "st,stih416-cpu-syscfg", "syscon";
|
|
reg = <0xfdde0000 0x1000>;
|
|
};
|
|
|
|
syscfg_compo:compo-syscfg@fd320000{
|
|
compatible = "st,stih416-compo-syscfg", "syscon";
|
|
reg = <0xfd320000 0x1000>;
|
|
};
|
|
|
|
syscfg_transport:transport-syscfg@fd690000{
|
|
compatible = "st,stih416-transport-syscfg", "syscon";
|
|
reg = <0xfd690000 0x1000>;
|
|
};
|
|
|
|
syscfg_lpm:lpm-syscfg@fe4b5100{
|
|
compatible = "st,stih416-lpm-syscfg", "syscon";
|
|
reg = <0xfe4b5100 0x8>;
|
|
};
|
|
|
|
serial2: serial@fed32000{
|
|
compatible = "st,asc";
|
|
status = "disabled";
|
|
reg = <0xfed32000 0x2c>;
|
|
interrupts = <0 197 0>;
|
|
clocks = <&CLK_S_ICN_REG_0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
|
|
};
|
|
|
|
/* SBC_UART1 */
|
|
sbc_serial1: serial@fe531000 {
|
|
compatible = "st,asc";
|
|
status = "disabled";
|
|
reg = <0xfe531000 0x2c>;
|
|
interrupts = <0 210 0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sbc_serial1>;
|
|
clocks = <&CLK_SYSIN>;
|
|
};
|
|
|
|
i2c@fed40000 {
|
|
compatible = "st,comms-ssc4-i2c";
|
|
reg = <0xfed40000 0x110>;
|
|
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&CLK_S_ICN_REG_0>;
|
|
clock-names = "ssc";
|
|
clock-frequency = <400000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c0_default>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@fed41000 {
|
|
compatible = "st,comms-ssc4-i2c";
|
|
reg = <0xfed41000 0x110>;
|
|
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&CLK_S_ICN_REG_0>;
|
|
clock-names = "ssc";
|
|
clock-frequency = <400000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1_default>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@fe540000 {
|
|
compatible = "st,comms-ssc4-i2c";
|
|
reg = <0xfe540000 0x110>;
|
|
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&CLK_SYSIN>;
|
|
clock-names = "ssc";
|
|
clock-frequency = <400000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@fe541000 {
|
|
compatible = "st,comms-ssc4-i2c";
|
|
reg = <0xfe541000 0x110>;
|
|
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&CLK_SYSIN>;
|
|
clock-names = "ssc";
|
|
clock-frequency = <400000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
ethernet0: dwmac@fe810000 {
|
|
device_type = "network";
|
|
compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
|
|
status = "disabled";
|
|
reg = <0xfe810000 0x8000>, <0x8bc 0x4>;
|
|
reg-names = "stmmaceth", "sti-ethconf";
|
|
|
|
interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
|
|
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
|
|
|
|
snps,pbl = <32>;
|
|
snps,mixed-burst;
|
|
|
|
st,syscon = <&syscfg_rear>;
|
|
resets = <&softreset STIH416_ETH0_SOFTRESET>;
|
|
reset-names = "stmmaceth";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_mii0>;
|
|
clock-names = "stmmaceth";
|
|
clocks = <&CLK_S_GMAC0_PHY>;
|
|
};
|
|
|
|
ethernet1: dwmac@fef08000 {
|
|
device_type = "network";
|
|
compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
|
|
status = "disabled";
|
|
reg = <0xfef08000 0x8000>, <0x7f0 0x4>;
|
|
reg-names = "stmmaceth", "sti-ethconf";
|
|
interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
|
|
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
|
|
|
|
snps,pbl = <32>;
|
|
snps,mixed-burst;
|
|
|
|
st,syscon = <&syscfg_sbc>;
|
|
|
|
resets = <&softreset STIH416_ETH1_SOFTRESET>;
|
|
reset-names = "stmmaceth";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_mii1>;
|
|
clock-names = "stmmaceth";
|
|
clocks = <&CLK_S_ETH1_PHY>;
|
|
};
|
|
|
|
rc: rc@fe518000 {
|
|
compatible = "st,comms-irb";
|
|
reg = <0xfe518000 0x234>;
|
|
interrupts = <0 203 0>;
|
|
rx-mode = "infrared";
|
|
clocks = <&CLK_SYSIN>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ir>;
|
|
resets = <&softreset STIH416_IRB_SOFTRESET>;
|
|
};
|
|
|
|
/* FSM */
|
|
spifsm: spifsm@fe902000 {
|
|
compatible = "st,spi-fsm";
|
|
reg = <0xfe902000 0x1000>;
|
|
pinctrl-0 = <&pinctrl_fsm>;
|
|
|
|
st,syscfg = <&syscfg_rear>;
|
|
st,boot-device-reg = <0x958>;
|
|
st,boot-device-spi = <0x1a>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|