b2c3e38a54
Re-engineer the LPAE TTBR setup code. Rather than passing some shifted address in order to fit in a CPU register, pass either a full physical address (in the case of r4, r5 for TTBR0) or a PFN (for TTBR1). This removes the ARCH_PGD_SHIFT hack, and the last dangerous user of cpu_set_ttbr() in the secondary CPU startup code path (which was there to re-set TTBR1 to the appropriate high physical address space on Keystone2.) Tested-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
/*
|
|
* Keystone SOC SMP platform code
|
|
*
|
|
* Copyright 2013 Texas Instruments, Inc.
|
|
* Cyril Chemparathy <cyril@ti.com>
|
|
* Santosh Shilimkar <santosh.shillimkar@ti.com>
|
|
*
|
|
* Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2, as published by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/smp.h>
|
|
#include <linux/io.h>
|
|
|
|
#include <asm/smp_plat.h>
|
|
#include <asm/prom.h>
|
|
#include <asm/tlbflush.h>
|
|
#include <asm/pgtable.h>
|
|
|
|
#include "keystone.h"
|
|
|
|
static int keystone_smp_boot_secondary(unsigned int cpu,
|
|
struct task_struct *idle)
|
|
{
|
|
unsigned long start = virt_to_idmap(&secondary_startup);
|
|
int error;
|
|
|
|
pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",
|
|
cpu, start);
|
|
|
|
error = keystone_cpu_smc(KEYSTONE_MON_CPU_UP_IDX, cpu, start);
|
|
if (error)
|
|
pr_err("CPU %d bringup failed with %d\n", cpu, error);
|
|
|
|
return error;
|
|
}
|
|
|
|
struct smp_operations keystone_smp_ops __initdata = {
|
|
.smp_boot_secondary = keystone_smp_boot_secondary,
|
|
};
|