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New and/or improved SoC support for this release: - Marvell Berlin: * Enable standard DT-based cpufreq * Add CPU hotplug support - Freescale: * Ethernet init for i.MX7D * Suspend/resume support for i.MX6UL - Allwinner: * Support for R8 chipset (used on NTC's $9 C.H.I.P board) - Mediatek: * SMP support for some platforms - Uniphier: * L2 support * Cleaned up SMP support, etc. + A handful of other patches around above functionality, and a few other smaller changes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWQCmaAAoJEIwa5zzehBx3F/0QAKIYmvmJM3sUanNEEwhRilx+ 3xhSgld7e25suLGwrNapTkd8VzVB4b8GnJhNShNk+l5WqfqICHCB4Aru2NmJHY8V yPj5vBrgJTVMnIiH7CRDPz9IlwAkWM4MmWi4PgFuhrk1T/0wPKPNMc40OWOloTeD gA5YmbbX1hNOqKoI/z+DK7CEdp1lHrEjeYIbnQ0SldFzkY9NKhrI784gtcz3si6E 19pFQ9LA7EtEv7aRcFOA0sazeooa2wiJ9P9L31Mn5APZBJj5H8HjyKdvOmJ8neQn +b77Tya11Q70U57uDq69l0rl58fpy650uTwYaLNGWmUdTgOiGMWN05lvIVNrQd/R gP+VEQDGsTH6kqOCy9gyLCmn9q9I7l0t9lwcu5TP52Xy9vqVq9rb388MkcPcsWk8 cYPvD8RcSaywZUV3YJgbYozBfVuf5rLVus6D54pMXe3N12KGaNBt8kk4co4jBwvh b//1urA82cdlEAZ/kiqHXjRMq/ht+dxtb6sSVOJ9frxPLuc7g1z4ORC+Z0PTS5WC zB0hMzPnTwXeqHcYpV4wP/vGtgZGpLevBkK7pKVdqKZykV8BS4FiT4HFp6Rghxs3 dxAz7JjQUle6KOX7YfuHdpLnyZFWQvLYyTn946xGKpw2QH/iWLwECpet2I87QzVs QkEkGygPhK4QcGccxz9N =h5xk -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "New and/or improved SoC support for this release: Marvell Berlin: - Enable standard DT-based cpufreq - Add CPU hotplug support Freescale: - Ethernet init for i.MX7D - Suspend/resume support for i.MX6UL Allwinner: - Support for R8 chipset (used on NTC's $9 C.H.I.P board) Mediatek: - SMP support for some platforms Uniphier: - L2 support - Cleaned up SMP support, etc. plus a handful of other patches around above functionality, and a few other smaller changes" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) ARM: uniphier: rework SMP operations to use trampoline code ARM: uniphier: add outer cache support Documentation: EXYNOS: Update bootloader interface on exynos542x ARM: mvebu: add broken-idle option ARM: orion5x: use mac_pton() helper ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned ARM: sunxi: Add R8 support ARM: digicolor: select pinctrl/gpio driver arm: berlin: add CPU hotplug support arm: berlin: use non-self-cleared reset register to reset cpu ARM: mediatek: add smp bringup code ARM: mediatek: enable gpt6 on boot up to make arch timer working soc: mediatek: Fix random hang up issue while kernel init soc: ti: qmss: make acc queue support optional in the driver soc: ti: add firmware file name as part of the driver Documentation: dt: soc: Add description for knav qmss driver ARM: S3C64XX: Use PWM lookup table for mach-smartq ARM: S3C64XX: Use PWM lookup table for mach-hmt ARM: S3C64XX: Use PWM lookup table for mach-crag6410 ARM: S3C64XX: Use PWM lookup table for smdk6410 ...
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
/*
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* Device Tree support for Mediatek SoCs
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*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Matthias Brugger <matthias.bgg@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <asm/mach/arch.h>
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#include <linux/of.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#define GPT6_CON_MT65xx 0x10008060
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#define GPT_ENABLE 0x31
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static void __init mediatek_timer_init(void)
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{
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void __iomem *gpt_base;
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if (of_machine_is_compatible("mediatek,mt6589") ||
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of_machine_is_compatible("mediatek,mt8135") ||
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of_machine_is_compatible("mediatek,mt8127")) {
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/* turn on GPT6 which ungates arch timer clocks */
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gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
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/* enable clock and set to free-run */
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writel(GPT_ENABLE, gpt_base);
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iounmap(gpt_base);
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}
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of_clk_init(NULL);
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clocksource_probe();
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};
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static const char * const mediatek_board_dt_compat[] = {
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"mediatek,mt6589",
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"mediatek,mt6592",
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"mediatek,mt8127",
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"mediatek,mt8135",
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NULL,
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};
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DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
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.dt_compat = mediatek_board_dt_compat,
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.init_time = mediatek_timer_init,
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MACHINE_END
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