ae809690b4
AXI-DMA IP supports configurable (c_sg_length_width) buffer length register width, hence read buffer length (xlnx,sg-length-width) DT property and ensure that driver doesn't program buffer length exceeding the supported limit. For VDMA and CDMA there is no change. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Andrea Merello <andrea.merello@gmail.com> [rebase, reword] Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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| Makefile | ||
| xilinx_dma.c | ||
| zynqmp_dma.c | ||