c942fddf87
Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
104 lines
2.3 KiB
C
104 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Queued spinlock
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*
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* (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
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*
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* Authors: Waiman Long <waiman.long@hp.com>
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*/
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#ifndef __ASM_GENERIC_QSPINLOCK_TYPES_H
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#define __ASM_GENERIC_QSPINLOCK_TYPES_H
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/*
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* Including atomic.h with PARAVIRT on will cause compilation errors because
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* of recursive header file incluson via paravirt_types.h. So don't include
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* it if PARAVIRT is on.
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*/
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#ifndef CONFIG_PARAVIRT
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#include <linux/types.h>
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#include <linux/atomic.h>
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#endif
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typedef struct qspinlock {
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union {
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atomic_t val;
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/*
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* By using the whole 2nd least significant byte for the
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* pending bit, we can allow better optimization of the lock
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* acquisition for the pending bit holder.
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*/
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#ifdef __LITTLE_ENDIAN
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struct {
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u8 locked;
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u8 pending;
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};
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struct {
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u16 locked_pending;
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u16 tail;
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};
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#else
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struct {
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u16 tail;
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u16 locked_pending;
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};
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struct {
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u8 reserved[2];
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u8 pending;
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u8 locked;
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};
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#endif
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};
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} arch_spinlock_t;
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/*
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* Initializier
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*/
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#define __ARCH_SPIN_LOCK_UNLOCKED { { .val = ATOMIC_INIT(0) } }
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/*
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* Bitfields in the atomic value:
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*
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* When NR_CPUS < 16K
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* 0- 7: locked byte
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* 8: pending
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* 9-15: not used
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* 16-17: tail index
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* 18-31: tail cpu (+1)
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*
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* When NR_CPUS >= 16K
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* 0- 7: locked byte
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* 8: pending
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* 9-10: tail index
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* 11-31: tail cpu (+1)
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*/
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#define _Q_SET_MASK(type) (((1U << _Q_ ## type ## _BITS) - 1)\
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<< _Q_ ## type ## _OFFSET)
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#define _Q_LOCKED_OFFSET 0
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#define _Q_LOCKED_BITS 8
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#define _Q_LOCKED_MASK _Q_SET_MASK(LOCKED)
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#define _Q_PENDING_OFFSET (_Q_LOCKED_OFFSET + _Q_LOCKED_BITS)
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#if CONFIG_NR_CPUS < (1U << 14)
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#define _Q_PENDING_BITS 8
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#else
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#define _Q_PENDING_BITS 1
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#endif
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#define _Q_PENDING_MASK _Q_SET_MASK(PENDING)
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#define _Q_TAIL_IDX_OFFSET (_Q_PENDING_OFFSET + _Q_PENDING_BITS)
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#define _Q_TAIL_IDX_BITS 2
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#define _Q_TAIL_IDX_MASK _Q_SET_MASK(TAIL_IDX)
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#define _Q_TAIL_CPU_OFFSET (_Q_TAIL_IDX_OFFSET + _Q_TAIL_IDX_BITS)
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#define _Q_TAIL_CPU_BITS (32 - _Q_TAIL_CPU_OFFSET)
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#define _Q_TAIL_CPU_MASK _Q_SET_MASK(TAIL_CPU)
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#define _Q_TAIL_OFFSET _Q_TAIL_IDX_OFFSET
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#define _Q_TAIL_MASK (_Q_TAIL_IDX_MASK | _Q_TAIL_CPU_MASK)
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#define _Q_LOCKED_VAL (1U << _Q_LOCKED_OFFSET)
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#define _Q_PENDING_VAL (1U << _Q_PENDING_OFFSET)
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#endif /* __ASM_GENERIC_QSPINLOCK_TYPES_H */
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