![Ben Hutchings](/assets/img/avatar_default.png)
Add a set of self-tests accessible thorugh ethtool. Add hardware loopback and TX disable control code to support them. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
361 lines
10 KiB
C
361 lines
10 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2006-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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/*
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* Useful functions for working with MDIO clause 45 PHYs
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*/
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#include <linux/types.h>
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#include <linux/ethtool.h>
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#include <linux/delay.h>
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#include "net_driver.h"
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#include "mdio_10g.h"
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#include "boards.h"
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int mdio_clause45_reset_mmd(struct efx_nic *port, int mmd,
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int spins, int spintime)
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{
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u32 ctrl;
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int phy_id = port->mii.phy_id;
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/* Catch callers passing values in the wrong units (or just silly) */
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EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
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mdio_clause45_write(port, phy_id, mmd, MDIO_MMDREG_CTRL1,
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(1 << MDIO_MMDREG_CTRL1_RESET_LBN));
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/* Wait for the reset bit to clear. */
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do {
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msleep(spintime);
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ctrl = mdio_clause45_read(port, phy_id, mmd, MDIO_MMDREG_CTRL1);
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spins--;
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} while (spins && (ctrl & (1 << MDIO_MMDREG_CTRL1_RESET_LBN)));
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return spins ? spins : -ETIMEDOUT;
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}
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static int mdio_clause45_check_mmd(struct efx_nic *efx, int mmd,
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int fault_fatal)
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{
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int status;
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int phy_id = efx->mii.phy_id;
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if (LOOPBACK_INTERNAL(efx))
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return 0;
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/* Read MMD STATUS2 to check it is responding. */
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status = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_STAT2);
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if (((status >> MDIO_MMDREG_STAT2_PRESENT_LBN) &
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((1 << MDIO_MMDREG_STAT2_PRESENT_WIDTH) - 1)) !=
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MDIO_MMDREG_STAT2_PRESENT_VAL) {
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EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
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return -EIO;
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}
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/* Read MMD STATUS 1 to check for fault. */
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status = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_STAT1);
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if ((status & (1 << MDIO_MMDREG_STAT1_FAULT_LBN)) != 0) {
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if (fault_fatal) {
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EFX_ERR(efx, "PHY MMD %d reporting fatal"
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" fault: status %x\n", mmd, status);
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return -EIO;
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} else {
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EFX_LOG(efx, "PHY MMD %d reporting status"
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" %x (expected)\n", mmd, status);
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}
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}
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return 0;
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}
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/* This ought to be ridiculous overkill. We expect it to fail rarely */
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#define MDIO45_RESET_TIME 1000 /* ms */
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#define MDIO45_RESET_ITERS 100
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int mdio_clause45_wait_reset_mmds(struct efx_nic *efx,
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unsigned int mmd_mask)
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{
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const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
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int tries = MDIO45_RESET_ITERS;
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int rc = 0;
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int in_reset;
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while (tries) {
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int mask = mmd_mask;
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int mmd = 0;
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int stat;
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in_reset = 0;
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while (mask) {
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if (mask & 1) {
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stat = mdio_clause45_read(efx,
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efx->mii.phy_id,
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mmd,
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MDIO_MMDREG_CTRL1);
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if (stat < 0) {
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EFX_ERR(efx, "failed to read status of"
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" MMD %d\n", mmd);
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return -EIO;
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}
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if (stat & (1 << MDIO_MMDREG_CTRL1_RESET_LBN))
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in_reset |= (1 << mmd);
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}
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mask = mask >> 1;
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mmd++;
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}
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if (!in_reset)
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break;
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tries--;
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msleep(spintime);
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}
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if (in_reset != 0) {
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EFX_ERR(efx, "not all MMDs came out of reset in time."
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" MMDs still in reset: %x\n", in_reset);
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rc = -ETIMEDOUT;
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}
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return rc;
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}
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int mdio_clause45_check_mmds(struct efx_nic *efx,
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unsigned int mmd_mask, unsigned int fatal_mask)
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{
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int devices, mmd = 0;
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int probe_mmd;
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/* Historically we have probed the PHYXS to find out what devices are
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* present,but that doesn't work so well if the PHYXS isn't expected
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* to exist, if so just find the first item in the list supplied. */
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probe_mmd = (mmd_mask & MDIO_MMDREG_DEVS0_PHYXS) ? MDIO_MMD_PHYXS :
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__ffs(mmd_mask);
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devices = mdio_clause45_read(efx, efx->mii.phy_id,
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probe_mmd, MDIO_MMDREG_DEVS0);
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/* Check all the expected MMDs are present */
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if (devices < 0) {
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EFX_ERR(efx, "failed to read devices present\n");
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return -EIO;
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}
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if ((devices & mmd_mask) != mmd_mask) {
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EFX_ERR(efx, "required MMDs not present: got %x, "
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"wanted %x\n", devices, mmd_mask);
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return -ENODEV;
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}
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EFX_TRACE(efx, "Devices present: %x\n", devices);
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/* Check all required MMDs are responding and happy. */
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while (mmd_mask) {
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if (mmd_mask & 1) {
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int fault_fatal = fatal_mask & 1;
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if (mdio_clause45_check_mmd(efx, mmd, fault_fatal))
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return -EIO;
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}
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mmd_mask = mmd_mask >> 1;
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fatal_mask = fatal_mask >> 1;
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mmd++;
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}
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return 0;
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}
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int mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
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{
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int phy_id = efx->mii.phy_id;
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int status;
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int ok = 1;
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int mmd = 0;
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int good;
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/* If the port is in loopback, then we should only consider a subset
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* of mmd's */
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if (LOOPBACK_INTERNAL(efx))
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return 1;
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else if (efx->loopback_mode == LOOPBACK_NETWORK)
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return 0;
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else if (efx->loopback_mode == LOOPBACK_PHYXS)
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mmd_mask &= ~(MDIO_MMDREG_DEVS0_PHYXS |
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MDIO_MMDREG_DEVS0_PCS |
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MDIO_MMDREG_DEVS0_PMAPMD);
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else if (efx->loopback_mode == LOOPBACK_PCS)
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mmd_mask &= ~(MDIO_MMDREG_DEVS0_PCS |
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MDIO_MMDREG_DEVS0_PMAPMD);
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else if (efx->loopback_mode == LOOPBACK_PMAPMD)
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mmd_mask &= ~MDIO_MMDREG_DEVS0_PMAPMD;
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while (mmd_mask) {
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if (mmd_mask & 1) {
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/* Double reads because link state is latched, and a
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* read moves the current state into the register */
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status = mdio_clause45_read(efx, phy_id,
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mmd, MDIO_MMDREG_STAT1);
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status = mdio_clause45_read(efx, phy_id,
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mmd, MDIO_MMDREG_STAT1);
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good = status & (1 << MDIO_MMDREG_STAT1_LINK_LBN);
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ok = ok && good;
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}
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mmd_mask = (mmd_mask >> 1);
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mmd++;
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}
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return ok;
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}
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void mdio_clause45_transmit_disable(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int ctrl1, ctrl2;
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ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
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MDIO_MMDREG_TXDIS);
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if (efx->tx_disabled)
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ctrl2 |= (1 << MDIO_MMDREG_TXDIS_GLOBAL_LBN);
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else
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ctrl1 &= ~(1 << MDIO_MMDREG_TXDIS_GLOBAL_LBN);
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if (ctrl1 != ctrl2)
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
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MDIO_MMDREG_TXDIS, ctrl2);
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}
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void mdio_clause45_phy_reconfigure(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int ctrl1, ctrl2;
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/* Handle (with debouncing) PMA/PMD loopback */
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ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
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MDIO_MMDREG_CTRL1);
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if (efx->loopback_mode == LOOPBACK_PMAPMD)
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ctrl2 |= (1 << MDIO_PMAPMD_CTRL1_LBACK_LBN);
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else
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ctrl2 &= ~(1 << MDIO_PMAPMD_CTRL1_LBACK_LBN);
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if (ctrl1 != ctrl2)
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
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MDIO_MMDREG_CTRL1, ctrl2);
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/* Handle (with debouncing) PCS loopback */
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ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS,
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MDIO_MMDREG_CTRL1);
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if (efx->loopback_mode == LOOPBACK_PCS)
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ctrl2 |= (1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
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else
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ctrl2 &= ~(1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
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if (ctrl1 != ctrl2)
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PCS,
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MDIO_MMDREG_CTRL1, ctrl2);
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/* Handle (with debouncing) PHYXS network loopback */
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ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
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MDIO_MMDREG_CTRL1);
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if (efx->loopback_mode == LOOPBACK_NETWORK)
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ctrl2 |= (1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
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else
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ctrl2 &= ~(1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
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if (ctrl1 != ctrl2)
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PHYXS,
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MDIO_MMDREG_CTRL1, ctrl2);
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}
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/**
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* mdio_clause45_get_settings - Read (some of) the PHY settings over MDIO.
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* @efx: Efx NIC
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* @ecmd: Buffer for settings
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*
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* On return the 'port', 'speed', 'supported' and 'advertising' fields of
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* ecmd have been filled out based on the PMA type.
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*/
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void mdio_clause45_get_settings(struct efx_nic *efx,
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struct ethtool_cmd *ecmd)
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{
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int pma_type;
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/* If no PMA is present we are presumably talking something XAUI-ish
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* like CX4. Which we report as FIBRE (see below) */
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if ((efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)) == 0) {
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ecmd->speed = SPEED_10000;
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ecmd->port = PORT_FIBRE;
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ecmd->supported = SUPPORTED_FIBRE;
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ecmd->advertising = ADVERTISED_FIBRE;
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return;
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}
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pma_type = mdio_clause45_read(efx, efx->mii.phy_id,
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MDIO_MMD_PMAPMD, MDIO_MMDREG_CTRL2);
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pma_type &= MDIO_PMAPMD_CTRL2_TYPE_MASK;
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switch (pma_type) {
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/* We represent CX4 as fibre in the absence of anything
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better. */
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case MDIO_PMAPMD_CTRL2_10G_CX4:
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ecmd->speed = SPEED_10000;
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ecmd->port = PORT_FIBRE;
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ecmd->supported = SUPPORTED_FIBRE;
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ecmd->advertising = ADVERTISED_FIBRE;
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break;
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/* 10G Base-T */
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case MDIO_PMAPMD_CTRL2_10G_BT:
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ecmd->speed = SPEED_10000;
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ecmd->port = PORT_TP;
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ecmd->supported = SUPPORTED_TP | SUPPORTED_10000baseT_Full;
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ecmd->advertising = (ADVERTISED_FIBRE
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| ADVERTISED_10000baseT_Full);
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break;
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case MDIO_PMAPMD_CTRL2_1G_BT:
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ecmd->speed = SPEED_1000;
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ecmd->port = PORT_TP;
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ecmd->supported = SUPPORTED_TP | SUPPORTED_1000baseT_Full;
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ecmd->advertising = (ADVERTISED_FIBRE
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| ADVERTISED_1000baseT_Full);
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break;
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case MDIO_PMAPMD_CTRL2_100_BT:
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ecmd->speed = SPEED_100;
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ecmd->port = PORT_TP;
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ecmd->supported = SUPPORTED_TP | SUPPORTED_100baseT_Full;
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ecmd->advertising = (ADVERTISED_FIBRE
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| ADVERTISED_100baseT_Full);
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break;
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case MDIO_PMAPMD_CTRL2_10_BT:
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ecmd->speed = SPEED_10;
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ecmd->port = PORT_TP;
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ecmd->supported = SUPPORTED_TP | SUPPORTED_10baseT_Full;
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ecmd->advertising = ADVERTISED_FIBRE | ADVERTISED_10baseT_Full;
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break;
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/* All the other defined modes are flavours of
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* 10G optical */
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default:
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ecmd->speed = SPEED_10000;
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ecmd->port = PORT_FIBRE;
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ecmd->supported = SUPPORTED_FIBRE;
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ecmd->advertising = ADVERTISED_FIBRE;
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break;
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}
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}
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/**
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* mdio_clause45_set_settings - Set (some of) the PHY settings over MDIO.
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* @efx: Efx NIC
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* @ecmd: New settings
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*
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* Currently this just enforces that we are _not_ changing the
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* 'port', 'speed', 'supported' or 'advertising' settings as these
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* cannot be changed on any currently supported PHY.
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*/
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int mdio_clause45_set_settings(struct efx_nic *efx,
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struct ethtool_cmd *ecmd)
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{
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struct ethtool_cmd tmpcmd;
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mdio_clause45_get_settings(efx, &tmpcmd);
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/* None of the current PHYs support more than one mode
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* of operation (and only 10GBT ever will), so keep things
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* simple for now */
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if ((ecmd->speed == tmpcmd.speed) && (ecmd->port == tmpcmd.port) &&
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(ecmd->supported == tmpcmd.supported) &&
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(ecmd->advertising == tmpcmd.advertising))
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return 0;
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return -EOPNOTSUPP;
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}
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