![Ben Hutchings](/assets/img/avatar_default.png)
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
267 lines
7 KiB
C
267 lines
7 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2007 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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/*****************************************************************************
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* Support for the SFE4001 NIC: driver code for the PCA9539 I/O expander that
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* controls the PHY power rails, and for the MAX6647 temp. sensor used to check
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* the PHY
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*/
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#include <linux/delay.h>
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#include "efx.h"
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#include "phy.h"
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#include "boards.h"
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#include "falcon.h"
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#include "falcon_hwdefs.h"
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#include "mac.h"
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/**************************************************************************
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*
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* I2C IO Expander device
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*
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**************************************************************************/
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#define PCA9539 0x74
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#define P0_IN 0x00
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#define P0_OUT 0x02
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#define P0_INVERT 0x04
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#define P0_CONFIG 0x06
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#define P0_EN_1V0X_LBN 0
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#define P0_EN_1V0X_WIDTH 1
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#define P0_EN_1V2_LBN 1
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#define P0_EN_1V2_WIDTH 1
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#define P0_EN_2V5_LBN 2
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#define P0_EN_2V5_WIDTH 1
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#define P0_EN_3V3X_LBN 3
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#define P0_EN_3V3X_WIDTH 1
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#define P0_EN_5V_LBN 4
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#define P0_EN_5V_WIDTH 1
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#define P0_SHORTEN_JTAG_LBN 5
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#define P0_SHORTEN_JTAG_WIDTH 1
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#define P0_X_TRST_LBN 6
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#define P0_X_TRST_WIDTH 1
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#define P0_DSP_RESET_LBN 7
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#define P0_DSP_RESET_WIDTH 1
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#define P1_IN 0x01
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#define P1_OUT 0x03
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#define P1_INVERT 0x05
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#define P1_CONFIG 0x07
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#define P1_AFE_PWD_LBN 0
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#define P1_AFE_PWD_WIDTH 1
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#define P1_DSP_PWD25_LBN 1
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#define P1_DSP_PWD25_WIDTH 1
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#define P1_RESERVED_LBN 2
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#define P1_RESERVED_WIDTH 2
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#define P1_SPARE_LBN 4
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#define P1_SPARE_WIDTH 4
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/**************************************************************************
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*
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* Temperature Sensor
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*
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**************************************************************************/
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#define MAX6647 0x4e
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#define RLTS 0x00
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#define RLTE 0x01
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#define RSL 0x02
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#define RCL 0x03
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#define RCRA 0x04
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#define RLHN 0x05
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#define RLLI 0x06
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#define RRHI 0x07
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#define RRLS 0x08
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#define WCRW 0x0a
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#define WLHO 0x0b
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#define WRHA 0x0c
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#define WRLN 0x0e
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#define OSHT 0x0f
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#define REET 0x10
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#define RIET 0x11
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#define RWOE 0x19
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#define RWOI 0x20
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#define HYS 0x21
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#define QUEUE 0x22
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#define MFID 0xfe
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#define REVID 0xff
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/* Status bits */
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#define MAX6647_BUSY (1 << 7) /* ADC is converting */
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#define MAX6647_LHIGH (1 << 6) /* Local high temp. alarm */
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#define MAX6647_LLOW (1 << 5) /* Local low temp. alarm */
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#define MAX6647_RHIGH (1 << 4) /* Remote high temp. alarm */
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#define MAX6647_RLOW (1 << 3) /* Remote low temp. alarm */
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#define MAX6647_FAULT (1 << 2) /* DXN/DXP short/open circuit */
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#define MAX6647_EOT (1 << 1) /* Remote junction overtemp. */
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#define MAX6647_IOT (1 << 0) /* Local junction overtemp. */
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static const u8 xgphy_max_temperature = 90;
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void sfe4001_poweroff(struct efx_nic *efx)
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{
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struct efx_i2c_interface *i2c = &efx->i2c;
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u8 cfg, out, in;
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EFX_INFO(efx, "%s\n", __func__);
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/* Turn off all power rails */
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out = 0xff;
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efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
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/* Disable port 1 outputs on IO expander */
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cfg = 0xff;
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efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1);
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/* Disable port 0 outputs on IO expander */
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cfg = 0xff;
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efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1);
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/* Clear any over-temperature alert */
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efx_i2c_read(i2c, MAX6647, RSL, &in, 1);
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}
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/* The P0_EN_3V3X line on SFE4001 boards (from A2 onward) is connected
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* to the FLASH_CFG_1 input on the DSP. We must keep it high at power-
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* up to allow writing the flash (done through MDIO from userland).
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*/
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unsigned int sfe4001_phy_flash_cfg;
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module_param_named(phy_flash_cfg, sfe4001_phy_flash_cfg, uint, 0444);
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MODULE_PARM_DESC(phy_flash_cfg,
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"Force PHY to enter flash configuration mode");
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/* This board uses an I2C expander to provider power to the PHY, which needs to
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* be turned on before the PHY can be used.
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* Context: Process context, rtnl lock held
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*/
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int sfe4001_poweron(struct efx_nic *efx)
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{
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struct efx_i2c_interface *i2c = &efx->i2c;
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unsigned int count;
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int rc;
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u8 out, in, cfg;
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efx_dword_t reg;
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/* 10Xpress has fixed-function LED pins, so there is no board-specific
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* blink code. */
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efx->board_info.blink = tenxpress_phy_blink;
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/* Ensure that XGXS and XAUI SerDes are held in reset */
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EFX_POPULATE_DWORD_7(reg, XX_PWRDNA_EN, 1,
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XX_PWRDNB_EN, 1,
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XX_RSTPLLAB_EN, 1,
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XX_RESETA_EN, 1,
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XX_RESETB_EN, 1,
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XX_RSTXGXSRX_EN, 1,
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XX_RSTXGXSTX_EN, 1);
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falcon_xmac_writel(efx, ®, XX_PWR_RST_REG_MAC);
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udelay(10);
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/* Set DSP over-temperature alert threshold */
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EFX_INFO(efx, "DSP cut-out at %dC\n", xgphy_max_temperature);
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rc = efx_i2c_write(i2c, MAX6647, WLHO,
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&xgphy_max_temperature, 1);
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if (rc)
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goto fail1;
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/* Read it back and verify */
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rc = efx_i2c_read(i2c, MAX6647, RLHN, &in, 1);
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if (rc)
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goto fail1;
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if (in != xgphy_max_temperature) {
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rc = -EFAULT;
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goto fail1;
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}
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/* Clear any previous over-temperature alert */
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rc = efx_i2c_read(i2c, MAX6647, RSL, &in, 1);
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if (rc)
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goto fail1;
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/* Enable port 0 and port 1 outputs on IO expander */
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cfg = 0x00;
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rc = efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1);
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if (rc)
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goto fail1;
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cfg = 0xff & ~(1 << P1_SPARE_LBN);
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rc = efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1);
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if (rc)
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goto fail2;
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/* Turn all power off then wait 1 sec. This ensures PHY is reset */
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out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
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(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
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(0 << P0_EN_1V0X_LBN));
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rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
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if (rc)
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goto fail3;
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schedule_timeout_uninterruptible(HZ);
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count = 0;
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do {
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/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
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out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
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(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
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(1 << P0_X_TRST_LBN));
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if (sfe4001_phy_flash_cfg)
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out |= 1 << P0_EN_3V3X_LBN;
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rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
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if (rc)
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goto fail3;
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msleep(10);
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/* Turn on 1V power rail */
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out &= ~(1 << P0_EN_1V0X_LBN);
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rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
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if (rc)
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goto fail3;
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EFX_INFO(efx, "waiting for power (attempt %d)...\n", count);
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schedule_timeout_uninterruptible(HZ);
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/* Check DSP is powered */
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rc = efx_i2c_read(i2c, PCA9539, P1_IN, &in, 1);
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if (rc)
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goto fail3;
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if (in & (1 << P1_AFE_PWD_LBN))
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goto done;
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/* DSP doesn't look powered in flash config mode */
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if (sfe4001_phy_flash_cfg)
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goto done;
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} while (++count < 20);
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EFX_INFO(efx, "timed out waiting for power\n");
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rc = -ETIMEDOUT;
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goto fail3;
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done:
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EFX_INFO(efx, "PHY is powered on\n");
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return 0;
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fail3:
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/* Turn off all power rails */
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out = 0xff;
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efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
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/* Disable port 1 outputs on IO expander */
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out = 0xff;
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efx_i2c_write(i2c, PCA9539, P1_CONFIG, &out, 1);
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fail2:
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/* Disable port 0 outputs on IO expander */
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out = 0xff;
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efx_i2c_write(i2c, PCA9539, P0_CONFIG, &out, 1);
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fail1:
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return rc;
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}
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