0343b2f4e4
I2C host controller need to be configured properly in order to meet I2C timings specified in the I2C protocol specification. Some Intel Broxton based machines do not have this information in the ACPI namespace (or the boot firmware does not support ACPI at all) so we use build-in device properties instead. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
216 lines
7.4 KiB
C
216 lines
7.4 KiB
C
/*
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* Intel LPSS PCI support.
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*
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* Copyright (C) 2015, Intel Corporation
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*
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* Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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* Mika Westerberg <mika.westerberg@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include "intel-lpss.h"
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static int intel_lpss_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct intel_lpss_platform_info *info;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
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GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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info->mem = &pdev->resource[0];
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info->irq = pdev->irq;
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/* Probably it is enough to set this for iDMA capable devices only */
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pci_set_master(pdev);
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ret = intel_lpss_probe(&pdev->dev, info);
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if (ret)
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return ret;
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pm_runtime_put(&pdev->dev);
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pm_runtime_allow(&pdev->dev);
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return 0;
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}
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static void intel_lpss_pci_remove(struct pci_dev *pdev)
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{
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pm_runtime_forbid(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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intel_lpss_remove(&pdev->dev);
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}
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static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
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static const struct intel_lpss_platform_info spt_info = {
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.clk_rate = 120000000,
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};
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static struct property_entry spt_i2c_properties[] = {
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PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
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{ },
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};
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static struct property_set spt_i2c_pset = {
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.properties = spt_i2c_properties,
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};
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static const struct intel_lpss_platform_info spt_i2c_info = {
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.clk_rate = 120000000,
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.pset = &spt_i2c_pset,
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};
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static struct property_entry uart_properties[] = {
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PROPERTY_ENTRY_U32("reg-io-width", 4),
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PROPERTY_ENTRY_U32("reg-shift", 2),
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PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
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{ },
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};
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static struct property_set uart_pset = {
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.properties = uart_properties,
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};
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static const struct intel_lpss_platform_info spt_uart_info = {
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.clk_rate = 120000000,
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.clk_con_id = "baudclk",
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.pset = &uart_pset,
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};
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static const struct intel_lpss_platform_info bxt_info = {
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.clk_rate = 100000000,
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};
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static const struct intel_lpss_platform_info bxt_uart_info = {
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.clk_rate = 100000000,
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.clk_con_id = "baudclk",
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.pset = &uart_pset,
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};
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static struct property_entry bxt_i2c_properties[] = {
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PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
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PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
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PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
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{ },
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};
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static struct property_set bxt_i2c_pset = {
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.properties = bxt_i2c_properties,
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};
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static const struct intel_lpss_platform_info bxt_i2c_info = {
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.clk_rate = 133000000,
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.pset = &bxt_i2c_pset,
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};
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static const struct pci_device_id intel_lpss_pci_ids[] = {
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/* BXT A-Step */
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{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
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/* BXT B-Step */
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{ PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
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/* APL */
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{ PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&bxt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
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/* SPT-LP */
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{ PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
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{ PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
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{ PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
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{ PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
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/* SPT-H */
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{ PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
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{ PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
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{ PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
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{ PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
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{ PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
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{ PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
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static struct pci_driver intel_lpss_pci_driver = {
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.name = "intel-lpss",
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.id_table = intel_lpss_pci_ids,
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.probe = intel_lpss_pci_probe,
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.remove = intel_lpss_pci_remove,
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.driver = {
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.pm = &intel_lpss_pci_pm_ops,
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},
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};
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module_pci_driver(intel_lpss_pci_driver);
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
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MODULE_DESCRIPTION("Intel LPSS PCI driver");
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MODULE_LICENSE("GPL v2");
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