![Will Deacon](/assets/img/avatar_default.png)
This patch adds ptrace, debug monitors and hardware breakpoints support. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
289 lines
6.6 KiB
C
289 lines
6.6 KiB
C
/*
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* ARMv8 single-step debug support and mdscr context switching.
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*
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* Copyright (C) 2012 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/cpu.h>
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#include <linux/debugfs.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/ptrace.h>
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#include <linux/stat.h>
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#include <asm/debug-monitors.h>
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#include <asm/local.h>
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#include <asm/cputype.h>
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#include <asm/system_misc.h>
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/* Low-level stepping controls. */
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#define DBG_MDSCR_SS (1 << 0)
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#define DBG_SPSR_SS (1 << 21)
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/* MDSCR_EL1 enabling bits */
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#define DBG_MDSCR_KDE (1 << 13)
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#define DBG_MDSCR_MDE (1 << 15)
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#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
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/* Determine debug architecture. */
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u8 debug_monitors_arch(void)
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{
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return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
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}
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/*
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* MDSCR access routines.
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*/
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static void mdscr_write(u32 mdscr)
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{
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unsigned long flags;
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local_dbg_save(flags);
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asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
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local_dbg_restore(flags);
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}
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static u32 mdscr_read(void)
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{
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u32 mdscr;
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asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
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return mdscr;
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}
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/*
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* Allow root to disable self-hosted debug from userspace.
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* This is useful if you want to connect an external JTAG debugger.
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*/
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static u32 debug_enabled = 1;
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static int create_debug_debugfs_entry(void)
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{
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debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
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return 0;
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}
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fs_initcall(create_debug_debugfs_entry);
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static int __init early_debug_disable(char *buf)
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{
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debug_enabled = 0;
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return 0;
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}
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early_param("nodebugmon", early_debug_disable);
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/*
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* Keep track of debug users on each core.
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* The ref counts are per-cpu so we use a local_t type.
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*/
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static DEFINE_PER_CPU(local_t, mde_ref_count);
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static DEFINE_PER_CPU(local_t, kde_ref_count);
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void enable_debug_monitors(enum debug_el el)
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{
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u32 mdscr, enable = 0;
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WARN_ON(preemptible());
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if (local_inc_return(&__get_cpu_var(mde_ref_count)) == 1)
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enable = DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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local_inc_return(&__get_cpu_var(kde_ref_count)) == 1)
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enable |= DBG_MDSCR_KDE;
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if (enable && debug_enabled) {
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mdscr = mdscr_read();
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mdscr |= enable;
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mdscr_write(mdscr);
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}
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}
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void disable_debug_monitors(enum debug_el el)
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{
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u32 mdscr, disable = 0;
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WARN_ON(preemptible());
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if (local_dec_and_test(&__get_cpu_var(mde_ref_count)))
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disable = ~DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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local_dec_and_test(&__get_cpu_var(kde_ref_count)))
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disable &= ~DBG_MDSCR_KDE;
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if (disable) {
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mdscr = mdscr_read();
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mdscr &= disable;
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mdscr_write(mdscr);
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}
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}
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/*
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* OS lock clearing.
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*/
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static void clear_os_lock(void *unused)
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{
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asm volatile("msr mdscr_el1, %0" : : "r" (0));
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isb();
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asm volatile("msr oslar_el1, %0" : : "r" (0));
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isb();
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}
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static int __cpuinit os_lock_notify(struct notifier_block *self,
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unsigned long action, void *data)
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{
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int cpu = (unsigned long)data;
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if (action == CPU_ONLINE)
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smp_call_function_single(cpu, clear_os_lock, NULL, 1);
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return NOTIFY_OK;
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}
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static struct notifier_block __cpuinitdata os_lock_nb = {
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.notifier_call = os_lock_notify,
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};
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static int __cpuinit debug_monitors_init(void)
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{
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/* Clear the OS lock. */
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smp_call_function(clear_os_lock, NULL, 1);
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clear_os_lock(NULL);
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/* Register hotplug handler. */
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register_cpu_notifier(&os_lock_nb);
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return 0;
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}
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postcore_initcall(debug_monitors_init);
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/*
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* Single step API and exception handling.
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*/
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static void set_regs_spsr_ss(struct pt_regs *regs)
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{
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unsigned long spsr;
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spsr = regs->pstate;
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spsr &= ~DBG_SPSR_SS;
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spsr |= DBG_SPSR_SS;
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regs->pstate = spsr;
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}
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static void clear_regs_spsr_ss(struct pt_regs *regs)
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{
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unsigned long spsr;
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spsr = regs->pstate;
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spsr &= ~DBG_SPSR_SS;
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regs->pstate = spsr;
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}
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static int single_step_handler(unsigned long addr, unsigned int esr,
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struct pt_regs *regs)
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{
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siginfo_t info;
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/*
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* If we are stepping a pending breakpoint, call the hw_breakpoint
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* handler first.
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*/
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if (!reinstall_suspended_bps(regs))
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return 0;
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if (user_mode(regs)) {
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info.si_signo = SIGTRAP;
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info.si_errno = 0;
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info.si_code = TRAP_HWBKPT;
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info.si_addr = (void __user *)instruction_pointer(regs);
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force_sig_info(SIGTRAP, &info, current);
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/*
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* ptrace will disable single step unless explicitly
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* asked to re-enable it. For other clients, it makes
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* sense to leave it enabled (i.e. rewind the controls
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* to the active-not-pending state).
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*/
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user_rewind_single_step(current);
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} else {
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/* TODO: route to KGDB */
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pr_warning("Unexpected kernel single-step exception at EL1\n");
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/*
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* Re-enable stepping since we know that we will be
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* returning to regs.
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*/
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set_regs_spsr_ss(regs);
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}
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return 0;
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}
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static int __init single_step_init(void)
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{
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hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
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TRAP_HWBKPT, "single-step handler");
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return 0;
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}
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arch_initcall(single_step_init);
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/* Re-enable single step for syscall restarting. */
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void user_rewind_single_step(struct task_struct *task)
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{
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/*
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* If single step is active for this thread, then set SPSR.SS
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* to 1 to avoid returning to the active-pending state.
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*/
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if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
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set_regs_spsr_ss(task_pt_regs(task));
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}
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void user_fastforward_single_step(struct task_struct *task)
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{
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if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
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clear_regs_spsr_ss(task_pt_regs(task));
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}
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/* Kernel API */
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void kernel_enable_single_step(struct pt_regs *regs)
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{
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WARN_ON(!irqs_disabled());
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set_regs_spsr_ss(regs);
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mdscr_write(mdscr_read() | DBG_MDSCR_SS);
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enable_debug_monitors(DBG_ACTIVE_EL1);
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}
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void kernel_disable_single_step(void)
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{
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WARN_ON(!irqs_disabled());
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mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
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disable_debug_monitors(DBG_ACTIVE_EL1);
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}
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int kernel_active_single_step(void)
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{
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WARN_ON(!irqs_disabled());
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return mdscr_read() & DBG_MDSCR_SS;
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}
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/* ptrace API */
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void user_enable_single_step(struct task_struct *task)
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{
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set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
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set_regs_spsr_ss(task_pt_regs(task));
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}
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void user_disable_single_step(struct task_struct *task)
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{
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clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
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}
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