![Christoph Hellwig](/assets/img/avatar_default.png)
No need for a file argument. If we'd really need it it's in vma->vm_file already. gbefb and sgivwfb used to set vma->vm_file to the file argument, but the kernel alrady did that. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Antonino Daplas <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
428 lines
9.8 KiB
C
428 lines
9.8 KiB
C
/* bw2.c: BWTWO frame buffer driver
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*
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* Copyright (C) 2003 David S. Miller (davem@redhat.com)
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* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
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* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
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* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
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*
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* Driver layout based loosely on tgafb.c, see that file for credits.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/fb.h>
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#include <linux/mm.h>
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#include <asm/io.h>
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#include <asm/sbus.h>
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#include <asm/oplib.h>
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#include <asm/fbio.h>
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#ifdef CONFIG_SPARC32
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#include <asm/sun4paddr.h>
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#endif
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#include "sbuslib.h"
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/*
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* Local functions.
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*/
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static int bw2_blank(int, struct fb_info *);
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static int bw2_mmap(struct fb_info *, struct vm_area_struct *);
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static int bw2_ioctl(struct fb_info *, unsigned int, unsigned long);
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/*
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* Frame buffer operations
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*/
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static struct fb_ops bw2_ops = {
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.owner = THIS_MODULE,
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.fb_blank = bw2_blank,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_mmap = bw2_mmap,
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.fb_ioctl = bw2_ioctl,
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#ifdef CONFIG_COMPAT
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.fb_compat_ioctl = sbusfb_compat_ioctl,
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#endif
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};
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/* OBio addresses for the bwtwo registers */
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#define BWTWO_REGISTER_OFFSET 0x400000
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struct bt_regs {
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volatile u32 addr;
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volatile u32 color_map;
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volatile u32 control;
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volatile u32 cursor;
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};
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struct bw2_regs {
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struct bt_regs cmap;
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volatile u8 control;
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volatile u8 status;
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volatile u8 cursor_start;
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volatile u8 cursor_end;
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volatile u8 h_blank_start;
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volatile u8 h_blank_end;
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volatile u8 h_sync_start;
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volatile u8 h_sync_end;
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volatile u8 comp_sync_end;
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volatile u8 v_blank_start_high;
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volatile u8 v_blank_start_low;
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volatile u8 v_blank_end;
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volatile u8 v_sync_start;
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volatile u8 v_sync_end;
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volatile u8 xfer_holdoff_start;
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volatile u8 xfer_holdoff_end;
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};
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/* Status Register Constants */
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#define BWTWO_SR_RES_MASK 0x70
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#define BWTWO_SR_1600_1280 0x50
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#define BWTWO_SR_1152_900_76_A 0x40
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#define BWTWO_SR_1152_900_76_B 0x60
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#define BWTWO_SR_ID_MASK 0x0f
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#define BWTWO_SR_ID_MONO 0x02
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#define BWTWO_SR_ID_MONO_ECL 0x03
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#define BWTWO_SR_ID_MSYNC 0x04
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#define BWTWO_SR_ID_NOCONN 0x0a
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/* Control Register Constants */
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#define BWTWO_CTL_ENABLE_INTS 0x80
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#define BWTWO_CTL_ENABLE_VIDEO 0x40
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#define BWTWO_CTL_ENABLE_TIMING 0x20
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#define BWTWO_CTL_ENABLE_CURCMP 0x10
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#define BWTWO_CTL_XTAL_MASK 0x0C
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#define BWTWO_CTL_DIVISOR_MASK 0x03
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/* Status Register Constants */
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#define BWTWO_STAT_PENDING_INT 0x80
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#define BWTWO_STAT_MSENSE_MASK 0x70
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#define BWTWO_STAT_ID_MASK 0x0f
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struct bw2_par {
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spinlock_t lock;
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struct bw2_regs __iomem *regs;
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u32 flags;
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#define BW2_FLAG_BLANKED 0x00000001
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unsigned long physbase;
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unsigned long fbsize;
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struct sbus_dev *sdev;
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};
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/**
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* bw2_blank - Optional function. Blanks the display.
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* @blank_mode: the blank mode we want.
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* @info: frame buffer structure that represents a single frame buffer
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*/
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static int
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bw2_blank(int blank, struct fb_info *info)
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{
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struct bw2_par *par = (struct bw2_par *) info->par;
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struct bw2_regs __iomem *regs = par->regs;
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unsigned long flags;
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u8 val;
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spin_lock_irqsave(&par->lock, flags);
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switch (blank) {
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case FB_BLANK_UNBLANK: /* Unblanking */
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val = sbus_readb(®s->control);
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val |= BWTWO_CTL_ENABLE_VIDEO;
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sbus_writeb(val, ®s->control);
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par->flags &= ~BW2_FLAG_BLANKED;
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break;
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case FB_BLANK_NORMAL: /* Normal blanking */
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case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
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case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
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case FB_BLANK_POWERDOWN: /* Poweroff */
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val = sbus_readb(®s->control);
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val &= ~BWTWO_CTL_ENABLE_VIDEO;
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sbus_writeb(val, ®s->control);
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par->flags |= BW2_FLAG_BLANKED;
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break;
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}
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spin_unlock_irqrestore(&par->lock, flags);
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return 0;
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}
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static struct sbus_mmap_map bw2_mmap_map[] = {
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{
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.size = SBUS_MMAP_FBSIZE(1)
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},
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{ .size = 0 }
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};
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static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma)
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{
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struct bw2_par *par = (struct bw2_par *)info->par;
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return sbusfb_mmap_helper(bw2_mmap_map,
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par->physbase, par->fbsize,
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(par->sdev ?
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par->sdev->reg_addrs[0].which_io :
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0),
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vma);
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}
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static int bw2_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
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{
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struct bw2_par *par = (struct bw2_par *) info->par;
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return sbusfb_ioctl_helper(cmd, arg, info,
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FBTYPE_SUN2BW, 1, par->fbsize);
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}
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/*
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* Initialisation
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*/
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static void
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bw2_init_fix(struct fb_info *info, int linebytes)
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{
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strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));
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info->fix.type = FB_TYPE_PACKED_PIXELS;
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info->fix.visual = FB_VISUAL_MONO01;
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info->fix.line_length = linebytes;
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info->fix.accel = FB_ACCEL_SUN_BWTWO;
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}
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static u8 bw2regs_1600[] __initdata = {
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0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13,
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0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e,
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0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01,
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0x10, 0x21, 0
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};
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static u8 bw2regs_ecl[] __initdata = {
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0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c,
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0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23,
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0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01,
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0x10, 0x20, 0
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};
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static u8 bw2regs_analog[] __initdata = {
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0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13,
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0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22,
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0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
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0x10, 0x20, 0
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};
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static u8 bw2regs_76hz[] __initdata = {
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0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f,
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0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a,
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0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01,
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0x10, 0x24, 0
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};
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static u8 bw2regs_66hz[] __initdata = {
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0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14,
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0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24,
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0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
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0x10, 0x20, 0
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};
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static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
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int *linebytes)
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{
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u8 status, mon;
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u8 *p;
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status = sbus_readb(&par->regs->status);
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mon = status & BWTWO_SR_RES_MASK;
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switch (status & BWTWO_SR_ID_MASK) {
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case BWTWO_SR_ID_MONO_ECL:
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if (mon == BWTWO_SR_1600_1280) {
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p = bw2regs_1600;
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info->var.xres = info->var.xres_virtual = 1600;
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info->var.yres = info->var.yres_virtual = 1280;
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*linebytes = 1600 / 8;
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} else
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p = bw2regs_ecl;
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break;
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case BWTWO_SR_ID_MONO:
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p = bw2regs_analog;
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break;
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case BWTWO_SR_ID_MSYNC:
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if (mon == BWTWO_SR_1152_900_76_A ||
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mon == BWTWO_SR_1152_900_76_B)
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p = bw2regs_76hz;
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else
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p = bw2regs_66hz;
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break;
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case BWTWO_SR_ID_NOCONN:
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return;
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default:
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prom_printf("bw2: can't handle SR %02x\n",
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status);
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prom_halt();
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}
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for ( ; *p; p += 2) {
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u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
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sbus_writeb(p[1], regp);
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}
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}
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struct all_info {
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struct fb_info info;
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struct bw2_par par;
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struct list_head list;
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};
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static LIST_HEAD(bw2_list);
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static void bw2_init_one(struct sbus_dev *sdev)
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{
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struct all_info *all;
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struct resource *resp;
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#ifdef CONFIG_SUN4
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struct resource res;
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#endif
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int linebytes;
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all = kmalloc(sizeof(*all), GFP_KERNEL);
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if (!all) {
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printk(KERN_ERR "bw2: Cannot allocate memory.\n");
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return;
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}
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memset(all, 0, sizeof(*all));
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INIT_LIST_HEAD(&all->list);
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spin_lock_init(&all->par.lock);
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all->par.sdev = sdev;
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#ifdef CONFIG_SUN4
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if (!sdev) {
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all->par.physbase = sun4_bwtwo_physaddr;
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res.start = sun4_bwtwo_physaddr;
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res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
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res.flags = IORESOURCE_IO;
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resp = &res;
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all->info.var.xres = all->info.var.xres_virtual = 1152;
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all->info.var.yres = all->info.var.yres_virtual = 900;
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all->info.var.bits_per_pixel = 1;
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linebytes = 1152 / 8;
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} else
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#else
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{
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if (!sdev)
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BUG();
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all->par.physbase = sdev->reg_addrs[0].phys_addr;
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resp = &sdev->resource[0];
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sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
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linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
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all->info.var.xres);
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}
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#endif
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all->info.var.red.length = all->info.var.green.length =
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all->info.var.blue.length = all->info.var.bits_per_pixel;
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all->info.var.red.offset = all->info.var.green.offset =
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all->info.var.blue.offset = 0;
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all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
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sizeof(struct bw2_regs), "bw2 regs");
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if (sdev && !prom_getbool(sdev->prom_node, "width"))
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bw2_do_default_mode(&all->par, &all->info, &linebytes);
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all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
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all->info.flags = FBINFO_DEFAULT;
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all->info.fbops = &bw2_ops;
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#if defined(CONFIG_SPARC32)
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if (sdev)
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all->info.screen_base = (char __iomem *)
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prom_getintdefault(sdev->prom_node, "address", 0);
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#endif
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if (!all->info.screen_base)
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all->info.screen_base =
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sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
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all->info.par = &all->par;
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bw2_blank(0, &all->info);
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bw2_init_fix(&all->info, linebytes);
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if (register_framebuffer(&all->info) < 0) {
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printk(KERN_ERR "bw2: Could not register framebuffer.\n");
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kfree(all);
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return;
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}
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list_add(&all->list, &bw2_list);
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printk("bw2: bwtwo at %lx:%lx\n",
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(long) (sdev ? sdev->reg_addrs[0].which_io : 0),
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(long) all->par.physbase);
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}
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int __init bw2_init(void)
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{
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struct sbus_bus *sbus;
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struct sbus_dev *sdev;
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if (fb_get_options("bw2fb", NULL))
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return -ENODEV;
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#ifdef CONFIG_SUN4
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bw2_init_one(NULL);
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#endif
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for_all_sbusdev(sdev, sbus) {
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if (!strcmp(sdev->prom_name, "bwtwo"))
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bw2_init_one(sdev);
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}
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return 0;
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}
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void __exit bw2_exit(void)
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{
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struct list_head *pos, *tmp;
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list_for_each_safe(pos, tmp, &bw2_list) {
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struct all_info *all = list_entry(pos, typeof(*all), list);
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unregister_framebuffer(&all->info);
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kfree(all);
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}
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}
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int __init
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bw2_setup(char *arg)
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{
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/* No cmdline options yet... */
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return 0;
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}
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module_init(bw2_init);
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#ifdef MODULE
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module_exit(bw2_exit);
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#endif
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MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
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MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
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MODULE_LICENSE("GPL");
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