316 lines
9.2 KiB
C
316 lines
9.2 KiB
C
/****************************************************************************
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 - 2019 Vivante Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*****************************************************************************
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*
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* The GPL License (GPL)
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*
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* Copyright (C) 2014 - 2019 Vivante Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*****************************************************************************
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*
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* Note: This software is released under dual MIT and GPL licenses. A
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* recipient may use this file under the terms of either the MIT license or
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* GPL License. If you wish to use only one license not the other, you can
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* indicate your decision by deleting one of the above license notices in your
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* version of this file.
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*
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*****************************************************************************/
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#ifndef _gc_hal_kernel_platform_h_
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#define _gc_hal_kernel_platform_h_
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#include <linux/mm.h>
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#include <linux/platform_device.h>
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#if USE_LINUX_PCIE
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#include <linux/pci.h>
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#endif
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typedef struct _gcsMODULE_PARAMETERS
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{
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gctINT irqs[gcvCORE_COUNT];
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gctPHYS_ADDR_T registerBases[gcvCORE_COUNT];
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gctSIZE_T registerSizes[gcvCORE_COUNT];
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gctINT bars[gcvCORE_COUNT];
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gctPOINTER registerBasesMapped[gcvCORE_COUNT];
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gctUINT chipIDs[gcvCORE_COUNT];
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/* Contiguous memory pool. */
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gctPHYS_ADDR_T contiguousBase;
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gctSIZE_T contiguousSize;
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gctBOOL contiguousRequested;
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/* External memory pool. */
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gctPHYS_ADDR_T externalBase;
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gctSIZE_T externalSize;
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/* Per-core SRAM. */
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gctPHYS_ADDR_T sRAMBases[gcvCORE_COUNT][gcvSRAM_INTER_COUNT];
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gctUINT32 sRAMSizes[gcvCORE_COUNT][gcvSRAM_INTER_COUNT];
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/* Shared SRAM. */
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gctPHYS_ADDR_T extSRAMBases[gcvSRAM_EXT_COUNT];
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gctUINT32 extSRAMSizes[gcvSRAM_EXT_COUNT];
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#if USE_LINUX_PCIE
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gctUINT32 regOffsets[gcvCORE_COUNT];
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gctINT32 sRAMBars[gcvSRAM_EXT_COUNT];
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gctINT32 sRAMOffsets[gcvSRAM_EXT_COUNT];
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#endif
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gctBOOL sRAMRequested;
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gctUINT32 sRAMLoopMode;
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gctPHYS_ADDR_T baseAddress;
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gctSIZE_T physSize;
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gctSIZE_T bankSize;
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gctUINT recovery;
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gctINT powerManagement;
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gctINT enableMmu;
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gctINT fastClear;
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gceCOMPRESSION_OPTION compression;
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gctUINT gpu3DMinClock;
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gctUINT userClusterMask;
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gctUINT smallBatch;
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/* Debug or other information. */
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gctUINT stuckDump;
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gctINT gpuProfiler;
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/* device type, 0 for char device, 1 for misc device. */
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gctUINT deviceType;
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gctUINT showArgs;
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/* mmu page table pool, 0 mean auto, 1 means virsual*/
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gctUINT mmuPageTablePool;
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gctUINT mmuDynamicMap;
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gctUINT allMapInOne;
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}
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gcsMODULE_PARAMETERS;
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typedef struct _gcsPLATFORM gcsPLATFORM;
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typedef struct _gcsPLATFORM_OPERATIONS
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{
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/*******************************************************************************
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**
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** adjustParam
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**
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** Override content of arguments, if a argument is not changed here, it will
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** keep as default value or value set by insmod command line.
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*/
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gceSTATUS
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(*adjustParam)(
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IN gcsPLATFORM * Platform,
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OUT gcsMODULE_PARAMETERS *Args
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);
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/*******************************************************************************
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**
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** getPower
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**
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** Prepare power and clock operation.
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*/
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gceSTATUS
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(*getPower)(
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IN gcsPLATFORM * Platform
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);
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/*******************************************************************************
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**
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** putPower
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**
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** Finish power and clock operation.
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*/
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gceSTATUS
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(*putPower)(
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IN gcsPLATFORM * Platform
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);
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/*******************************************************************************
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**
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** setPower
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**
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** Set power state of specified GPU.
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**
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** INPUT:
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**
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** gceCORE GPU
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** GPU neeed to config.
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**
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** gceBOOL Enable
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** Enable or disable power.
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*/
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gceSTATUS
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(*setPower)(
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IN gcsPLATFORM * Platform,
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IN gceCORE GPU,
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IN gctBOOL Enable
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);
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/*******************************************************************************
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**
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** setClock
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**
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** Set clock state of specified GPU.
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**
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** INPUT:
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**
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** gceCORE GPU
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** GPU neeed to config.
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**
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** gceBOOL Enable
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** Enable or disable clock.
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*/
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gceSTATUS
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(*setClock)(
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IN gcsPLATFORM * Platform,
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IN gceCORE GPU,
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IN gctBOOL Enable
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);
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/*******************************************************************************
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**
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** reset
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**
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** Reset GPU outside.
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**
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** INPUT:
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**
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** gceCORE GPU
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** GPU neeed to reset.
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*/
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gceSTATUS
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(*reset)(
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IN gcsPLATFORM * Platform,
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IN gceCORE GPU
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);
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/*******************************************************************************
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**
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** getGPUPhysical
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**
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** Convert CPU physical address to GPU physical address if they are
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** different.
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*/
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gceSTATUS
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(*getGPUPhysical)(
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IN gcsPLATFORM * Platform,
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IN gctPHYS_ADDR_T CPUPhysical,
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OUT gctPHYS_ADDR_T * GPUPhysical
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);
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/*******************************************************************************
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**
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** getCPUPhysical
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**
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** Convert GPU physical address to CPU physical address if they are
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** different.
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*/
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gceSTATUS
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(*getCPUPhysical)(
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IN gcsPLATFORM * Platform,
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IN gctPHYS_ADDR_T GPUPhysical,
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OUT gctPHYS_ADDR_T * CPUPhysical
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);
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/*******************************************************************************
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**
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** adjustProt
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**
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** Override Prot flag when mapping paged memory to userspace.
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*/
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gceSTATUS
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(*adjustProt)(
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IN struct vm_area_struct * vma
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);
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/*******************************************************************************
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**
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** shrinkMemory
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**
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** Do something to collect memory, eg, act as oom killer.
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*/
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gceSTATUS
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(*shrinkMemory)(
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IN gcsPLATFORM * Platform
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);
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/*******************************************************************************
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**
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** getPolicyID
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**
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** Get policyID for a specified surface type.
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*/
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gceSTATUS
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(*getPolicyID)(
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IN gcsPLATFORM *Platform,
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IN gceVIDMEM_TYPE Type,
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OUT gctUINT32_PTR PolicyID,
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OUT gctUINT32_PTR AXIConfig
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);
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}
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gcsPLATFORM_OPERATIONS;
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struct _gcsPLATFORM
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{
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struct platform_device *device;
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struct platform_driver *driver;
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const char *name;
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gcsPLATFORM_OPERATIONS* ops;
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/* TODO: Remove AXI-SRAM size from feature database. */
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gckDEVICE dev;
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/* PLATFORM specific flags */
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gctUINT32 flagBits;
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void* priv;
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};
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int gckPLATFORM_Init(struct platform_driver *pdrv, gcsPLATFORM **platform);
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int gckPLATFORM_Terminate(gcsPLATFORM *platform);
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#endif
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