![Takashi Yoshii](/assets/img/avatar_default.png)
The r8a73a4 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
95 lines
2.3 KiB
Plaintext
95 lines
2.3 KiB
Plaintext
/*
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* Device Tree Source for the r8a73a4 SoC
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/ {
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compatible = "renesas,r8a73a4";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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clock-frequency = <1500000000>;
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};
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0 0xf1001000 0 0x1000>,
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<0 0xf1002000 0 0x1000>,
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<0 0xf1004000 0 0x2000>,
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<0 0xf1006000 0 0x2000>;
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interrupts = <1 9 0xf04>;
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gic-cpuif@4 {
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compatible = "arm,gic-cpuif";
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cpuif-id = <4>;
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cpu = <&cpu0>;
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};
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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};
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irqc0: interrupt-controller@e61c0000 {
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compatible = "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0000 0 0x200>;
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interrupt-parent = <&gic>;
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interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
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<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
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<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
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<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
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<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
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<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
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<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
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<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
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};
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irqc1: interrupt-controller@e61c0200 {
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compatible = "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0200 0 0x200>;
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interrupt-parent = <&gic>;
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interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
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<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
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<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
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<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
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<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
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<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
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<0 56 4>, <0 57 4>;
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};
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thermal@e61f0000 {
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compatible = "renesas,rcar-thermal";
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reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
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<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
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interrupt-parent = <&gic>;
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interrupts = <0 69 4>;
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};
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};
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