![Linus Torvalds](/assets/img/avatar_default.png)
Pull core irq updates from Thomas Gleixner: "The irq department delivers: - Another tree wide update to get rid of the horrible create_irq interface along with its even more horrible variants. That also gets rid of the last leftovers of the initial sparse irq hackery. arch/driver specific changes have been either acked or ignored. - A fix for the spurious interrupt detection logic with threaded interrupts. - A new ARM SoC interrupt controller - The usual pile of fixes and improvements all over the place" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits) Documentation: brcmstb-l2: Add Broadcom STB Level-2 interrupt controller binding irqchip: brcmstb-l2: Add Broadcom Set Top Box Level-2 interrupt controller genirq: Improve documentation to match current implementation ARM: iop13xx: fix msi support with sparse IRQ genirq: Provide !SMP stub for irq_set_affinity_notifier() irqchip: armada-370-xp: Move the devicetree binding documentation irqchip: gic: Use mask field in GICC_IAR genirq: Remove dynamic_irq mess ia64: Use irq_init_desc genirq: Replace dynamic_irq_init/cleanup genirq: Remove irq_reserve_irq[s] genirq: Replace reserve_irqs in core code s390: Avoid call to irq_reserve_irqs() s390: Remove pointless arch_show_interrupts() s390: pci: Check return value of alloc_irq_desc() proper sh: intc: Remove pointless irq_reserve_irqs() invocation x86, irq: Remove pointless irq_reserve_irqs() call genirq: Make create/destroy_irq() ia64 private tile: Use SPARSE_IRQ tile: pci: Use irq_alloc/free_hwirq() ...
973 lines
20 KiB
C
973 lines
20 KiB
C
/*
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* Copyright IBM Corp. 2012
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*
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* Author(s):
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*
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* The System z PCI code is a rewrite from a prototype by
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* the following people (Kudoz!):
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* Alexander Schmidt
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* Christoph Raisch
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* Hannes Hering
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* Hoang-Nam Nguyen
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* Jan-Bernd Themann
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* Stefan Roscher
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* Thomas Klein
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*/
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#define COMPONENT "zPCI"
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#define pr_fmt(fmt) COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/kernel_stat.h>
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#include <linux/seq_file.h>
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#include <linux/pci.h>
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#include <linux/msi.h>
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#include <asm/isc.h>
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#include <asm/airq.h>
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#include <asm/facility.h>
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#include <asm/pci_insn.h>
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#include <asm/pci_clp.h>
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#include <asm/pci_dma.h>
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#define DEBUG /* enable pr_debug */
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#define SIC_IRQ_MODE_ALL 0
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#define SIC_IRQ_MODE_SINGLE 1
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#define ZPCI_NR_DMA_SPACES 1
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#define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
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/* list of all detected zpci devices */
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static LIST_HEAD(zpci_list);
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static DEFINE_SPINLOCK(zpci_list_lock);
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static void zpci_enable_irq(struct irq_data *data);
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static void zpci_disable_irq(struct irq_data *data);
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static struct irq_chip zpci_irq_chip = {
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.name = "zPCI",
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.irq_unmask = zpci_enable_irq,
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.irq_mask = zpci_disable_irq,
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};
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static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
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static DEFINE_SPINLOCK(zpci_domain_lock);
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static struct airq_iv *zpci_aisb_iv;
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static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
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/* Adapter interrupt definitions */
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static void zpci_irq_handler(struct airq_struct *airq);
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static struct airq_struct zpci_airq = {
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.handler = zpci_irq_handler,
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.isc = PCI_ISC,
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};
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/* I/O Map */
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static DEFINE_SPINLOCK(zpci_iomap_lock);
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static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
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struct zpci_iomap_entry *zpci_iomap_start;
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EXPORT_SYMBOL_GPL(zpci_iomap_start);
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static struct kmem_cache *zdev_fmb_cache;
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struct zpci_dev *get_zdev(struct pci_dev *pdev)
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{
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return (struct zpci_dev *) pdev->sysdata;
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}
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struct zpci_dev *get_zdev_by_fid(u32 fid)
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{
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struct zpci_dev *tmp, *zdev = NULL;
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spin_lock(&zpci_list_lock);
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list_for_each_entry(tmp, &zpci_list, entry) {
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if (tmp->fid == fid) {
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zdev = tmp;
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break;
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}
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}
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spin_unlock(&zpci_list_lock);
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return zdev;
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}
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static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
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{
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return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
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}
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int pci_domain_nr(struct pci_bus *bus)
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{
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return ((struct zpci_dev *) bus->sysdata)->domain;
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}
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EXPORT_SYMBOL_GPL(pci_domain_nr);
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int pci_proc_domain(struct pci_bus *bus)
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{
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return pci_domain_nr(bus);
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}
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EXPORT_SYMBOL_GPL(pci_proc_domain);
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/* Modify PCI: Register adapter interruptions */
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static int zpci_set_airq(struct zpci_dev *zdev)
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{
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u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
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struct zpci_fib fib = {0};
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fib.isc = PCI_ISC;
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fib.sum = 1; /* enable summary notifications */
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fib.noi = airq_iv_end(zdev->aibv);
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fib.aibv = (unsigned long) zdev->aibv->vector;
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fib.aibvo = 0; /* each zdev has its own interrupt vector */
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fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
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fib.aisbo = zdev->aisb & 63;
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return zpci_mod_fc(req, &fib);
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}
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struct mod_pci_args {
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u64 base;
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u64 limit;
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u64 iota;
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u64 fmb_addr;
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};
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static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
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{
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u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
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struct zpci_fib fib = {0};
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fib.pba = args->base;
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fib.pal = args->limit;
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fib.iota = args->iota;
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fib.fmb_addr = args->fmb_addr;
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return zpci_mod_fc(req, &fib);
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}
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/* Modify PCI: Register I/O address translation parameters */
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int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
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u64 base, u64 limit, u64 iota)
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{
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struct mod_pci_args args = { base, limit, iota, 0 };
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WARN_ON_ONCE(iota & 0x3fff);
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args.iota |= ZPCI_IOTA_RTTO_FLAG;
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return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
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}
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/* Modify PCI: Unregister I/O address translation parameters */
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int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
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{
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struct mod_pci_args args = { 0, 0, 0, 0 };
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return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
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}
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/* Modify PCI: Unregister adapter interruptions */
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static int zpci_clear_airq(struct zpci_dev *zdev)
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{
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struct mod_pci_args args = { 0, 0, 0, 0 };
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return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
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}
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/* Modify PCI: Set PCI function measurement parameters */
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int zpci_fmb_enable_device(struct zpci_dev *zdev)
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{
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struct mod_pci_args args = { 0, 0, 0, 0 };
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if (zdev->fmb)
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return -EINVAL;
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zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
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if (!zdev->fmb)
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return -ENOMEM;
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WARN_ON((u64) zdev->fmb & 0xf);
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args.fmb_addr = virt_to_phys(zdev->fmb);
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return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
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}
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/* Modify PCI: Disable PCI function measurement */
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int zpci_fmb_disable_device(struct zpci_dev *zdev)
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{
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struct mod_pci_args args = { 0, 0, 0, 0 };
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int rc;
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if (!zdev->fmb)
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return -EINVAL;
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/* Function measurement is disabled if fmb address is zero */
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rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
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kmem_cache_free(zdev_fmb_cache, zdev->fmb);
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zdev->fmb = NULL;
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return rc;
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}
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#define ZPCI_PCIAS_CFGSPC 15
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static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
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{
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u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
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u64 data;
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int rc;
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rc = zpci_load(&data, req, offset);
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if (!rc) {
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data = data << ((8 - len) * 8);
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data = le64_to_cpu(data);
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*val = (u32) data;
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} else
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*val = 0xffffffff;
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return rc;
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}
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static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
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{
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u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
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u64 data = val;
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int rc;
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data = cpu_to_le64(data);
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data = data >> ((8 - len) * 8);
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rc = zpci_store(data, req, offset);
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return rc;
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}
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static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag)
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{
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int offset, pos;
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u32 mask_bits;
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if (msi->msi_attrib.is_msix) {
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offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
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PCI_MSIX_ENTRY_VECTOR_CTRL;
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msi->masked = readl(msi->mask_base + offset);
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writel(flag, msi->mask_base + offset);
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} else if (msi->msi_attrib.maskbit) {
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pos = (long) msi->mask_base;
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pci_read_config_dword(msi->dev, pos, &mask_bits);
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mask_bits &= ~(mask);
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mask_bits |= flag & mask;
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pci_write_config_dword(msi->dev, pos, mask_bits);
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} else
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return 0;
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msi->msi_attrib.maskbit = !!flag;
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return 1;
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}
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static void zpci_enable_irq(struct irq_data *data)
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{
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struct msi_desc *msi = irq_get_msi_desc(data->irq);
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zpci_msi_set_mask_bits(msi, 1, 0);
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}
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static void zpci_disable_irq(struct irq_data *data)
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{
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struct msi_desc *msi = irq_get_msi_desc(data->irq);
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zpci_msi_set_mask_bits(msi, 1, 1);
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}
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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}
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size,
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resource_size_t align)
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{
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return 0;
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}
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/* combine single writes by using store-block insn */
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void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
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{
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zpci_memcpy_toio(to, from, count);
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}
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/* Create a virtual mapping cookie for a PCI BAR */
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void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
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{
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struct zpci_dev *zdev = get_zdev(pdev);
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u64 addr;
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int idx;
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if ((bar & 7) != bar)
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return NULL;
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idx = zdev->bars[bar].map_idx;
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spin_lock(&zpci_iomap_lock);
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zpci_iomap_start[idx].fh = zdev->fh;
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zpci_iomap_start[idx].bar = bar;
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spin_unlock(&zpci_iomap_lock);
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addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
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return (void __iomem *) addr;
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}
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EXPORT_SYMBOL_GPL(pci_iomap);
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void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
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{
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unsigned int idx;
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idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
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spin_lock(&zpci_iomap_lock);
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zpci_iomap_start[idx].fh = 0;
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zpci_iomap_start[idx].bar = 0;
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spin_unlock(&zpci_iomap_lock);
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}
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EXPORT_SYMBOL_GPL(pci_iounmap);
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static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *val)
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{
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struct zpci_dev *zdev = get_zdev_by_bus(bus);
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int ret;
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if (!zdev || devfn != ZPCI_DEVFN)
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ret = -ENODEV;
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else
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ret = zpci_cfg_load(zdev, where, val, size);
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return ret;
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}
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static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 val)
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{
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struct zpci_dev *zdev = get_zdev_by_bus(bus);
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int ret;
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if (!zdev || devfn != ZPCI_DEVFN)
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ret = -ENODEV;
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else
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ret = zpci_cfg_store(zdev, where, val, size);
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return ret;
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}
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static struct pci_ops pci_root_ops = {
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.read = pci_read,
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.write = pci_write,
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};
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static void zpci_irq_handler(struct airq_struct *airq)
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{
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unsigned long si, ai;
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struct airq_iv *aibv;
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int irqs_on = 0;
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inc_irq_stat(IRQIO_PCI);
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for (si = 0;;) {
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/* Scan adapter summary indicator bit vector */
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si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
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if (si == -1UL) {
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if (irqs_on++)
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/* End of second scan with interrupts on. */
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break;
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/* First scan complete, reenable interrupts. */
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zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
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si = 0;
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continue;
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}
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/* Scan the adapter interrupt vector for this device. */
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aibv = zpci_aibv[si];
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for (ai = 0;;) {
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ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
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if (ai == -1UL)
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break;
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inc_irq_stat(IRQIO_MSI);
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airq_iv_lock(aibv, ai);
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generic_handle_irq(airq_iv_get_data(aibv, ai));
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airq_iv_unlock(aibv, ai);
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}
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}
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}
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int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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{
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struct zpci_dev *zdev = get_zdev(pdev);
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unsigned int hwirq, msi_vecs;
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unsigned long aisb;
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struct msi_desc *msi;
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struct msi_msg msg;
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int rc, irq;
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if (type == PCI_CAP_ID_MSI && nvec > 1)
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return 1;
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msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX);
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msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI);
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/* Allocate adapter summary indicator bit */
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rc = -EIO;
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aisb = airq_iv_alloc_bit(zpci_aisb_iv);
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if (aisb == -1UL)
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goto out;
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zdev->aisb = aisb;
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/* Create adapter interrupt vector */
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rc = -ENOMEM;
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zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
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if (!zdev->aibv)
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goto out_si;
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|
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/* Wire up shortcut pointer */
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zpci_aibv[aisb] = zdev->aibv;
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|
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/* Request MSI interrupts */
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hwirq = 0;
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list_for_each_entry(msi, &pdev->msi_list, list) {
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rc = -EIO;
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irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
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if (irq < 0)
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goto out_msi;
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rc = irq_set_msi_desc(irq, msi);
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if (rc)
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goto out_msi;
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irq_set_chip_and_handler(irq, &zpci_irq_chip,
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handle_simple_irq);
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msg.data = hwirq;
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msg.address_lo = zdev->msi_addr & 0xffffffff;
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msg.address_hi = zdev->msi_addr >> 32;
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write_msi_msg(irq, &msg);
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airq_iv_set_data(zdev->aibv, hwirq, irq);
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hwirq++;
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}
|
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|
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/* Enable adapter interrupts */
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rc = zpci_set_airq(zdev);
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if (rc)
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goto out_msi;
|
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return (msi_vecs == nvec) ? 0 : msi_vecs;
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|
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out_msi:
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list_for_each_entry(msi, &pdev->msi_list, list) {
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if (hwirq-- == 0)
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break;
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irq_set_msi_desc(msi->irq, NULL);
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irq_free_desc(msi->irq);
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msi->msg.address_lo = 0;
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msi->msg.address_hi = 0;
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msi->msg.data = 0;
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msi->irq = 0;
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}
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zpci_aibv[aisb] = NULL;
|
|
airq_iv_release(zdev->aibv);
|
|
out_si:
|
|
airq_iv_free_bit(zpci_aisb_iv, aisb);
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
void arch_teardown_msi_irqs(struct pci_dev *pdev)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(pdev);
|
|
struct msi_desc *msi;
|
|
int rc;
|
|
|
|
/* Disable adapter interrupts */
|
|
rc = zpci_clear_airq(zdev);
|
|
if (rc)
|
|
return;
|
|
|
|
/* Release MSI interrupts */
|
|
list_for_each_entry(msi, &pdev->msi_list, list) {
|
|
zpci_msi_set_mask_bits(msi, 1, 1);
|
|
irq_set_msi_desc(msi->irq, NULL);
|
|
irq_free_desc(msi->irq);
|
|
msi->msg.address_lo = 0;
|
|
msi->msg.address_hi = 0;
|
|
msi->msg.data = 0;
|
|
msi->irq = 0;
|
|
}
|
|
|
|
zpci_aibv[zdev->aisb] = NULL;
|
|
airq_iv_release(zdev->aibv);
|
|
airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
|
|
}
|
|
|
|
static void zpci_map_resources(struct zpci_dev *zdev)
|
|
{
|
|
struct pci_dev *pdev = zdev->pdev;
|
|
resource_size_t len;
|
|
int i;
|
|
|
|
for (i = 0; i < PCI_BAR_COUNT; i++) {
|
|
len = pci_resource_len(pdev, i);
|
|
if (!len)
|
|
continue;
|
|
pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
|
|
pdev->resource[i].end = pdev->resource[i].start + len - 1;
|
|
}
|
|
}
|
|
|
|
static void zpci_unmap_resources(struct zpci_dev *zdev)
|
|
{
|
|
struct pci_dev *pdev = zdev->pdev;
|
|
resource_size_t len;
|
|
int i;
|
|
|
|
for (i = 0; i < PCI_BAR_COUNT; i++) {
|
|
len = pci_resource_len(pdev, i);
|
|
if (!len)
|
|
continue;
|
|
pci_iounmap(pdev, (void *) pdev->resource[i].start);
|
|
}
|
|
}
|
|
|
|
static int __init zpci_irq_init(void)
|
|
{
|
|
int rc;
|
|
|
|
rc = register_adapter_interrupt(&zpci_airq);
|
|
if (rc)
|
|
goto out;
|
|
/* Set summary to 1 to be called every time for the ISC. */
|
|
*zpci_airq.lsi_ptr = 1;
|
|
|
|
rc = -ENOMEM;
|
|
zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
|
|
if (!zpci_aisb_iv)
|
|
goto out_airq;
|
|
|
|
zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
|
|
return 0;
|
|
|
|
out_airq:
|
|
unregister_adapter_interrupt(&zpci_airq);
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
static void zpci_irq_exit(void)
|
|
{
|
|
airq_iv_release(zpci_aisb_iv);
|
|
unregister_adapter_interrupt(&zpci_airq);
|
|
}
|
|
|
|
static int zpci_alloc_iomap(struct zpci_dev *zdev)
|
|
{
|
|
int entry;
|
|
|
|
spin_lock(&zpci_iomap_lock);
|
|
entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
|
|
if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
|
|
spin_unlock(&zpci_iomap_lock);
|
|
return -ENOSPC;
|
|
}
|
|
set_bit(entry, zpci_iomap);
|
|
spin_unlock(&zpci_iomap_lock);
|
|
return entry;
|
|
}
|
|
|
|
static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
|
|
{
|
|
spin_lock(&zpci_iomap_lock);
|
|
memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
|
|
clear_bit(entry, zpci_iomap);
|
|
spin_unlock(&zpci_iomap_lock);
|
|
}
|
|
|
|
static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
|
|
unsigned long size, unsigned long flags)
|
|
{
|
|
struct resource *r;
|
|
|
|
r = kzalloc(sizeof(*r), GFP_KERNEL);
|
|
if (!r)
|
|
return NULL;
|
|
|
|
r->start = start;
|
|
r->end = r->start + size - 1;
|
|
r->flags = flags;
|
|
r->name = zdev->res_name;
|
|
|
|
if (request_resource(&iomem_resource, r)) {
|
|
kfree(r);
|
|
return NULL;
|
|
}
|
|
return r;
|
|
}
|
|
|
|
static int zpci_setup_bus_resources(struct zpci_dev *zdev,
|
|
struct list_head *resources)
|
|
{
|
|
unsigned long addr, size, flags;
|
|
struct resource *res;
|
|
int i, entry;
|
|
|
|
snprintf(zdev->res_name, sizeof(zdev->res_name),
|
|
"PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
|
|
|
|
for (i = 0; i < PCI_BAR_COUNT; i++) {
|
|
if (!zdev->bars[i].size)
|
|
continue;
|
|
entry = zpci_alloc_iomap(zdev);
|
|
if (entry < 0)
|
|
return entry;
|
|
zdev->bars[i].map_idx = entry;
|
|
|
|
/* only MMIO is supported */
|
|
flags = IORESOURCE_MEM;
|
|
if (zdev->bars[i].val & 8)
|
|
flags |= IORESOURCE_PREFETCH;
|
|
if (zdev->bars[i].val & 4)
|
|
flags |= IORESOURCE_MEM_64;
|
|
|
|
addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
|
|
|
|
size = 1UL << zdev->bars[i].size;
|
|
|
|
res = __alloc_res(zdev, addr, size, flags);
|
|
if (!res) {
|
|
zpci_free_iomap(zdev, entry);
|
|
return -ENOMEM;
|
|
}
|
|
zdev->bars[i].res = res;
|
|
pci_add_resource(resources, res);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < PCI_BAR_COUNT; i++) {
|
|
if (!zdev->bars[i].size)
|
|
continue;
|
|
|
|
zpci_free_iomap(zdev, zdev->bars[i].map_idx);
|
|
release_resource(zdev->bars[i].res);
|
|
kfree(zdev->bars[i].res);
|
|
}
|
|
}
|
|
|
|
int pcibios_add_device(struct pci_dev *pdev)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(pdev);
|
|
struct resource *res;
|
|
int i;
|
|
|
|
zdev->pdev = pdev;
|
|
pdev->dev.groups = zpci_attr_groups;
|
|
zpci_map_resources(zdev);
|
|
|
|
for (i = 0; i < PCI_BAR_COUNT; i++) {
|
|
res = &pdev->resource[i];
|
|
if (res->parent || !res->flags)
|
|
continue;
|
|
pci_claim_resource(pdev, i);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int pcibios_enable_device(struct pci_dev *pdev, int mask)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(pdev);
|
|
|
|
zdev->pdev = pdev;
|
|
zpci_debug_init_device(zdev);
|
|
zpci_fmb_enable_device(zdev);
|
|
zpci_map_resources(zdev);
|
|
|
|
return pci_enable_resources(pdev, mask);
|
|
}
|
|
|
|
void pcibios_disable_device(struct pci_dev *pdev)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(pdev);
|
|
|
|
zpci_unmap_resources(zdev);
|
|
zpci_fmb_disable_device(zdev);
|
|
zpci_debug_exit_device(zdev);
|
|
zdev->pdev = NULL;
|
|
}
|
|
|
|
#ifdef CONFIG_HIBERNATE_CALLBACKS
|
|
static int zpci_restore(struct device *dev)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(to_pci_dev(dev));
|
|
int ret = 0;
|
|
|
|
if (zdev->state != ZPCI_FN_STATE_ONLINE)
|
|
goto out;
|
|
|
|
ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
|
|
if (ret)
|
|
goto out;
|
|
|
|
zpci_map_resources(zdev);
|
|
zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET,
|
|
zdev->start_dma + zdev->iommu_size - 1,
|
|
(u64) zdev->dma_table);
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int zpci_freeze(struct device *dev)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev(to_pci_dev(dev));
|
|
|
|
if (zdev->state != ZPCI_FN_STATE_ONLINE)
|
|
return 0;
|
|
|
|
zpci_unregister_ioat(zdev, 0);
|
|
return clp_disable_fh(zdev);
|
|
}
|
|
|
|
struct dev_pm_ops pcibios_pm_ops = {
|
|
.thaw_noirq = zpci_restore,
|
|
.freeze_noirq = zpci_freeze,
|
|
.restore_noirq = zpci_restore,
|
|
.poweroff_noirq = zpci_freeze,
|
|
};
|
|
#endif /* CONFIG_HIBERNATE_CALLBACKS */
|
|
|
|
static int zpci_alloc_domain(struct zpci_dev *zdev)
|
|
{
|
|
spin_lock(&zpci_domain_lock);
|
|
zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
|
|
if (zdev->domain == ZPCI_NR_DEVICES) {
|
|
spin_unlock(&zpci_domain_lock);
|
|
return -ENOSPC;
|
|
}
|
|
set_bit(zdev->domain, zpci_domain);
|
|
spin_unlock(&zpci_domain_lock);
|
|
return 0;
|
|
}
|
|
|
|
static void zpci_free_domain(struct zpci_dev *zdev)
|
|
{
|
|
spin_lock(&zpci_domain_lock);
|
|
clear_bit(zdev->domain, zpci_domain);
|
|
spin_unlock(&zpci_domain_lock);
|
|
}
|
|
|
|
void pcibios_remove_bus(struct pci_bus *bus)
|
|
{
|
|
struct zpci_dev *zdev = get_zdev_by_bus(bus);
|
|
|
|
zpci_exit_slot(zdev);
|
|
zpci_cleanup_bus_resources(zdev);
|
|
zpci_free_domain(zdev);
|
|
|
|
spin_lock(&zpci_list_lock);
|
|
list_del(&zdev->entry);
|
|
spin_unlock(&zpci_list_lock);
|
|
|
|
kfree(zdev);
|
|
}
|
|
|
|
static int zpci_scan_bus(struct zpci_dev *zdev)
|
|
{
|
|
LIST_HEAD(resources);
|
|
int ret;
|
|
|
|
ret = zpci_setup_bus_resources(zdev, &resources);
|
|
if (ret)
|
|
return ret;
|
|
|
|
zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
|
|
zdev, &resources);
|
|
if (!zdev->bus) {
|
|
zpci_cleanup_bus_resources(zdev);
|
|
return -EIO;
|
|
}
|
|
|
|
zdev->bus->max_bus_speed = zdev->max_bus_speed;
|
|
return 0;
|
|
}
|
|
|
|
int zpci_enable_device(struct zpci_dev *zdev)
|
|
{
|
|
int rc;
|
|
|
|
rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
|
|
if (rc)
|
|
goto out;
|
|
|
|
rc = zpci_dma_init_device(zdev);
|
|
if (rc)
|
|
goto out_dma;
|
|
|
|
zdev->state = ZPCI_FN_STATE_ONLINE;
|
|
return 0;
|
|
|
|
out_dma:
|
|
clp_disable_fh(zdev);
|
|
out:
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL_GPL(zpci_enable_device);
|
|
|
|
int zpci_disable_device(struct zpci_dev *zdev)
|
|
{
|
|
zpci_dma_exit_device(zdev);
|
|
return clp_disable_fh(zdev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(zpci_disable_device);
|
|
|
|
int zpci_create_device(struct zpci_dev *zdev)
|
|
{
|
|
int rc;
|
|
|
|
rc = zpci_alloc_domain(zdev);
|
|
if (rc)
|
|
goto out;
|
|
|
|
if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
|
|
rc = zpci_enable_device(zdev);
|
|
if (rc)
|
|
goto out_free;
|
|
}
|
|
rc = zpci_scan_bus(zdev);
|
|
if (rc)
|
|
goto out_disable;
|
|
|
|
spin_lock(&zpci_list_lock);
|
|
list_add_tail(&zdev->entry, &zpci_list);
|
|
spin_unlock(&zpci_list_lock);
|
|
|
|
zpci_init_slot(zdev);
|
|
|
|
return 0;
|
|
|
|
out_disable:
|
|
if (zdev->state == ZPCI_FN_STATE_ONLINE)
|
|
zpci_disable_device(zdev);
|
|
out_free:
|
|
zpci_free_domain(zdev);
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
void zpci_stop_device(struct zpci_dev *zdev)
|
|
{
|
|
zpci_dma_exit_device(zdev);
|
|
/*
|
|
* Note: SCLP disables fh via set-pci-fn so don't
|
|
* do that here.
|
|
*/
|
|
}
|
|
EXPORT_SYMBOL_GPL(zpci_stop_device);
|
|
|
|
static inline int barsize(u8 size)
|
|
{
|
|
return (size) ? (1 << size) >> 10 : 0;
|
|
}
|
|
|
|
static int zpci_mem_init(void)
|
|
{
|
|
zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
|
|
16, 0, NULL);
|
|
if (!zdev_fmb_cache)
|
|
goto error_zdev;
|
|
|
|
/* TODO: use realloc */
|
|
zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
|
|
GFP_KERNEL);
|
|
if (!zpci_iomap_start)
|
|
goto error_iomap;
|
|
return 0;
|
|
|
|
error_iomap:
|
|
kmem_cache_destroy(zdev_fmb_cache);
|
|
error_zdev:
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static void zpci_mem_exit(void)
|
|
{
|
|
kfree(zpci_iomap_start);
|
|
kmem_cache_destroy(zdev_fmb_cache);
|
|
}
|
|
|
|
static unsigned int s390_pci_probe = 1;
|
|
static unsigned int s390_pci_initialized;
|
|
|
|
char * __init pcibios_setup(char *str)
|
|
{
|
|
if (!strcmp(str, "off")) {
|
|
s390_pci_probe = 0;
|
|
return NULL;
|
|
}
|
|
return str;
|
|
}
|
|
|
|
bool zpci_is_enabled(void)
|
|
{
|
|
return s390_pci_initialized;
|
|
}
|
|
|
|
static int __init pci_base_init(void)
|
|
{
|
|
int rc;
|
|
|
|
if (!s390_pci_probe)
|
|
return 0;
|
|
|
|
if (!test_facility(2) || !test_facility(69)
|
|
|| !test_facility(71) || !test_facility(72))
|
|
return 0;
|
|
|
|
rc = zpci_debug_init();
|
|
if (rc)
|
|
goto out;
|
|
|
|
rc = zpci_mem_init();
|
|
if (rc)
|
|
goto out_mem;
|
|
|
|
rc = zpci_irq_init();
|
|
if (rc)
|
|
goto out_irq;
|
|
|
|
rc = zpci_dma_init();
|
|
if (rc)
|
|
goto out_dma;
|
|
|
|
rc = clp_scan_pci_devices();
|
|
if (rc)
|
|
goto out_find;
|
|
|
|
s390_pci_initialized = 1;
|
|
return 0;
|
|
|
|
out_find:
|
|
zpci_dma_exit();
|
|
out_dma:
|
|
zpci_irq_exit();
|
|
out_irq:
|
|
zpci_mem_exit();
|
|
out_mem:
|
|
zpci_debug_exit();
|
|
out:
|
|
return rc;
|
|
}
|
|
subsys_initcall_sync(pci_base_init);
|
|
|
|
void zpci_rescan(void)
|
|
{
|
|
if (zpci_is_enabled())
|
|
clp_rescan_pci_devices_simple();
|
|
}
|