335204dfb8
The information is already included in the COPYING file in the kernel sources root directory, we don't want to modify all source files when the FSF will move to a new address, and I'm tired of seeing the related checkpatch.pl warnings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
144 lines
3.5 KiB
C
144 lines
3.5 KiB
C
/*
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* SMP support for R-Mobile / SH-Mobile - r8a7779 portion
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*
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_twd.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7779.h"
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#define AVECR IOMEM(0xfe700040)
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#define R8A7779_SCU_BASE 0xf0000000
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static struct rcar_sysc_ch r8a7779_ch_cpu1 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 1, /* ARM1 */
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.isr_bit = 1, /* ARM1 */
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};
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static struct rcar_sysc_ch r8a7779_ch_cpu2 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 2, /* ARM2 */
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.isr_bit = 2, /* ARM2 */
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};
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static struct rcar_sysc_ch r8a7779_ch_cpu3 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 3, /* ARM3 */
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.isr_bit = 3, /* ARM3 */
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};
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static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = {
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[1] = &r8a7779_ch_cpu1,
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[2] = &r8a7779_ch_cpu2,
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[3] = &r8a7779_ch_cpu3,
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};
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#ifdef CONFIG_HAVE_ARM_TWD
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29);
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void __init r8a7779_register_twd(void)
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{
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twd_local_timer_register(&twd_local_timer);
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}
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#endif
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static int r8a7779_platform_cpu_kill(unsigned int cpu)
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{
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struct rcar_sysc_ch *ch = NULL;
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int ret = -EIO;
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cpu = cpu_logical_map(cpu);
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if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[cpu];
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if (ch)
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ret = rcar_sysc_power_down(ch);
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return ret ? ret : 1;
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}
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static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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struct rcar_sysc_ch *ch = NULL;
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unsigned int lcpu = cpu_logical_map(cpu);
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int ret;
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if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[lcpu];
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if (ch)
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ret = rcar_sysc_power_up(ch);
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else
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ret = -EIO;
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return ret;
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}
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static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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{
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/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
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__raw_writel(__pa(shmobile_boot_vector), AVECR);
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shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
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shmobile_boot_arg = (unsigned long)shmobile_scu_base;
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/* setup r8a7779 specific SCU bits */
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shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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r8a7779_pm_init();
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/* power off secondary CPUs */
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r8a7779_platform_cpu_kill(1);
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r8a7779_platform_cpu_kill(2);
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r8a7779_platform_cpu_kill(3);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int r8a7779_cpu_kill(unsigned int cpu)
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{
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if (shmobile_smp_scu_cpu_kill(cpu))
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return r8a7779_platform_cpu_kill(cpu);
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return 0;
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}
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static int r8a7779_cpu_disable(unsigned int cpu)
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{
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/* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
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return cpu == 0 ? -EPERM : 0;
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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struct smp_operations r8a7779_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
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.smp_boot_secondary = r8a7779_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = r8a7779_cpu_disable,
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.cpu_die = shmobile_smp_scu_cpu_die,
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.cpu_kill = r8a7779_cpu_kill,
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#endif
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};
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