2c054716a5
Due to recently merged patches and previous merge conflicts, the Samsung PM Debug functionality no longer can be enabled. This patch fixes incorrect dependency of SAMSUNG_PM_DEBUG on an integer symbol and adds missing header inclusion. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
99 lines
2.4 KiB
C
99 lines
2.4 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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* Tomasz Figa <t.figa@samsung.com>
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* Copyright (C) 2008 Openmoko, Inc.
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* Copyright (C) 2004-2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* Samsung common power management (suspend to RAM) debug support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_core.h>
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#include <linux/serial_s3c.h>
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#include <linux/io.h>
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#include <asm/mach/map.h>
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#include <plat/cpu.h>
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#include <plat/pm-common.h>
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#ifdef CONFIG_SAMSUNG_ATAGS
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#include <mach/pm-core.h>
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#else
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static inline void s3c_pm_debug_init_uart(void) {}
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static inline void s3c_pm_arch_update_uart(void __iomem *regs,
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struct pm_uart_save *save) {}
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#endif
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static struct pm_uart_save uart_save;
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extern void printascii(const char *);
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void s3c_pm_dbg(const char *fmt, ...)
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{
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va_list va;
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char buff[256];
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va_start(va, fmt);
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vsnprintf(buff, sizeof(buff), fmt, va);
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va_end(va);
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printascii(buff);
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}
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void s3c_pm_debug_init(void)
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{
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/* restart uart clocks so we can use them to output */
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s3c_pm_debug_init_uart();
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}
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static inline void __iomem *s3c_pm_uart_base(void)
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{
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unsigned long paddr;
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unsigned long vaddr;
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debug_ll_addr(&paddr, &vaddr);
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return (void __iomem *)vaddr;
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}
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void s3c_pm_save_uarts(void)
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{
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void __iomem *regs = s3c_pm_uart_base();
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struct pm_uart_save *save = &uart_save;
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save->ulcon = __raw_readl(regs + S3C2410_ULCON);
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save->ucon = __raw_readl(regs + S3C2410_UCON);
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save->ufcon = __raw_readl(regs + S3C2410_UFCON);
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save->umcon = __raw_readl(regs + S3C2410_UMCON);
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save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
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if (!soc_is_s3c2410())
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save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
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S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
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regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
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}
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void s3c_pm_restore_uarts(void)
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{
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void __iomem *regs = s3c_pm_uart_base();
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struct pm_uart_save *save = &uart_save;
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s3c_pm_arch_update_uart(regs, save);
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__raw_writel(save->ulcon, regs + S3C2410_ULCON);
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__raw_writel(save->ucon, regs + S3C2410_UCON);
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__raw_writel(save->ufcon, regs + S3C2410_UFCON);
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__raw_writel(save->umcon, regs + S3C2410_UMCON);
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__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
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if (!soc_is_s3c2410())
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__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
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}
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