46c3e6b876
Since the CTOP is SMT hardware multi-threaded, we need to hint the HW that now will be a very good time to do a hardware thread context switching. This is done by issuing the schd.rw instruction (binary coded here so as to not require specific revision of GCC to build the kernel). sched.rw means that Thread becomes eligible for execution by the threads scheduler after all pending read/write transactions were completed. Implementing cpu_relax_lowlatency() with barrier() Since with current semantics of cpu_relax() it may take a while till yielded CPU will get back. Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Vineet Gupta <vgupta@synopsys.com>
161 lines
4.8 KiB
C
161 lines
4.8 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* vineetg: March 2009
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* -Implemented task_pt_regs( )
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*
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* Amit Bhor, Sameer Dhavale, Ashwin Chaugule: Codito Technologies 2004
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*/
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#ifndef __ASM_ARC_PROCESSOR_H
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#define __ASM_ARC_PROCESSOR_H
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#ifndef __ASSEMBLY__
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#include <asm/ptrace.h>
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#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
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/* These DPFP regs need to be saved/restored across ctx-sw */
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struct arc_fpu {
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struct {
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unsigned int l, h;
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} aux_dpfp[2];
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};
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#endif
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/* Arch specific stuff which needs to be saved per task.
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* However these items are not so important so as to earn a place in
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* struct thread_info
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*/
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struct thread_struct {
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unsigned long ksp; /* kernel mode stack pointer */
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unsigned long callee_reg; /* pointer to callee regs */
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unsigned long fault_address; /* dbls as brkpt holder as well */
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#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
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struct arc_fpu fpu;
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#endif
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};
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#define INIT_THREAD { \
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.ksp = sizeof(init_stack) + (unsigned long) init_stack, \
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}
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/* Forward declaration, a strange C thing */
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struct task_struct;
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#define task_pt_regs(p) \
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((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
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/* Free all resources held by a thread */
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#define release_thread(thread) do { } while (0)
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/*
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* A lot of busy-wait loops in SMP are based off of non-volatile data otherwise
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* get optimised away by gcc
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*/
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#ifndef CONFIG_EZNPS_MTM_EXT
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#define cpu_relax() barrier()
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#define cpu_relax_lowlatency() cpu_relax()
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#else
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#define cpu_relax() \
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__asm__ __volatile__ (".word %0" : : "i"(CTOP_INST_SCHD_RW) : "memory")
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#define cpu_relax_lowlatency() barrier()
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#endif
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#define copy_segments(tsk, mm) do { } while (0)
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#define release_segments(mm) do { } while (0)
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ret)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
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/*
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* Where abouts of Task's sp, fp, blink when it was last seen in kernel mode.
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* Look in process.c for details of kernel stack layout
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*/
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#define TSK_K_ESP(tsk) (tsk->thread.ksp)
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#define TSK_K_REG(tsk, off) (*((unsigned long *)(TSK_K_ESP(tsk) + \
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sizeof(struct callee_regs) + off)))
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#define TSK_K_BLINK(tsk) TSK_K_REG(tsk, 4)
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#define TSK_K_FP(tsk) TSK_K_REG(tsk, 0)
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#define thread_saved_pc(tsk) TSK_K_BLINK(tsk)
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extern void start_thread(struct pt_regs * regs, unsigned long pc,
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unsigned long usp);
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extern unsigned int get_wchan(struct task_struct *p);
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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* Should the PC register be read instead ? This macro does not seem to
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* be used in many places so this wont be all that bad.
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*/
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#define current_text_addr() ({ __label__ _l; _l: &&_l; })
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#endif /* !__ASSEMBLY__ */
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/*
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* Default System Memory Map on ARC
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*
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* ---------------------------- (lower 2G, Translated) -------------------------
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* 0x0000_0000 0x5FFF_FFFF (user vaddr: TASK_SIZE)
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* 0x6000_0000 0x6FFF_FFFF (reserved gutter between U/K)
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* 0x7000_0000 0x7FFF_FFFF (kvaddr: vmalloc/modules/pkmap..)
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*
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* PAGE_OFFSET ---------------- (Upper 2G, Untranslated) -----------------------
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* 0x8000_0000 0xBFFF_FFFF (kernel direct mapped)
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* 0xC000_0000 0xFFFF_FFFF (peripheral uncached space)
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* -----------------------------------------------------------------------------
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*/
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#define TASK_SIZE 0x60000000
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#define VMALLOC_START (PAGE_OFFSET - (CONFIG_ARC_KVADDR_SIZE << 20))
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/* 1 PGDIR_SIZE each for fixmap/pkmap, 2 PGDIR_SIZE gutter (see asm/highmem.h) */
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#define VMALLOC_SIZE ((CONFIG_ARC_KVADDR_SIZE << 20) - PGDIR_SIZE * 4)
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#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
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#define USER_KERNEL_GUTTER (VMALLOC_START - TASK_SIZE)
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#ifdef CONFIG_ARC_PLAT_EZNPS
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/* NPS architecture defines special window of 129M in user address space for
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* special memory areas, when accessing this window the MMU do not use TLB.
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* Instead MMU direct the access to:
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* 0x57f00000:0x57ffffff -- 1M of closely coupled memory (aka CMEM)
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* 0x58000000:0x5fffffff -- 16 huge pages, 8M each, with fixed map (aka FMTs)
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*
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* CMEM - is the fastest memory we got and its size is 16K.
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* FMT - is used to map either to internal/external memory.
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* Internal memory is the second fast memory and its size is 16M
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* External memory is the biggest memory (16G) and also the slowest.
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*
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* STACK_TOP need to be PMD align (21bit) that is why we supply 0x57e00000.
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*/
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#define STACK_TOP 0x57e00000
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#else
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#define STACK_TOP TASK_SIZE
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#endif
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#define STACK_TOP_MAX STACK_TOP
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/* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
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#endif /* __ASM_ARC_PROCESSOR_H */
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