![Vineet Gupta](/assets/img/avatar_default.png)
With LLOCK/SCOND, the rwlock counter can be atomically updated w/o need for a guarding spin lock. This in turn elides the EXchange instruction based spinning which causes the cacheline transition to exclusive state and concurrent spinning across cores would cause the line to keep bouncing around. LLOCK/SCOND based implementation is superior as spinning on LLOCK keeps the cacheline in shared state. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
38 lines
1 KiB
C
38 lines
1 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_SPINLOCK_TYPES_H
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#define __ASM_SPINLOCK_TYPES_H
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typedef struct {
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volatile unsigned int slock;
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} arch_spinlock_t;
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#define __ARCH_SPIN_LOCK_UNLOCKED__ 0
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#define __ARCH_SPIN_LOCK_LOCKED__ 1
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#define __ARCH_SPIN_LOCK_UNLOCKED { __ARCH_SPIN_LOCK_UNLOCKED__ }
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#define __ARCH_SPIN_LOCK_LOCKED { __ARCH_SPIN_LOCK_LOCKED__ }
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/*
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* Unlocked : 0x0100_0000
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* Read lock(s) : 0x00FF_FFFF to 0x01 (Multiple Readers decrement it)
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* Write lock : 0x0, but only if prior value is "unlocked" 0x0100_0000
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*/
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typedef struct {
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volatile unsigned int counter;
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#ifndef CONFIG_ARC_HAS_LLSC
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arch_spinlock_t lock_mutex;
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#endif
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} arch_rwlock_t;
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#define __ARCH_RW_LOCK_UNLOCKED__ 0x01000000
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#define __ARCH_RW_LOCK_UNLOCKED { .counter = __ARCH_RW_LOCK_UNLOCKED__ }
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#endif
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