![Chris Metcalf](/assets/img/avatar_default.png)
The kernel code was using some <asm> headers that included a mix of hardware-specific information (typically found in Tilera <arch> headers) and structures, enums, and function declarations supporting the disassembly function of the tile-desc.c sources. This change refactors that code so that a hardware-specific, but OS- and application-agnostic header, is created: <arch/opcode.h>. This header is then exported to userspace along with the other <arch> headers and can be used to build userspace code; in particular, it is used by glibc as part of implementing the backtrace() function. The new header, together with a header that specifically describes the disassembly code (<asm/tile-desc.h> with _32 and _64 variants), replaces the old <asm/opcode-tile*.h> and <asm/opcode_constants*.h> headers. As part of this change, we are also renaming the 32-bit constants from TILE_xxx to TILEPRO_xxx to better reflect the fact that they are specific to the TILEPro architecture, and not to TILE-Gx and any successor "tile" architecture chips. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
484 lines
11 KiB
C
484 lines
11 KiB
C
/* TILE-Gx opcode information.
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*
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* Copyright 2011 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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*
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*
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*
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*
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*/
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#ifndef opcode_tile_h
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#define opcode_tile_h
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#include <arch/opcode.h>
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enum
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{
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TILEGX_MAX_OPERANDS = 4 /* bfexts */
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};
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typedef enum
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{
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TILEGX_OPC_BPT,
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TILEGX_OPC_INFO,
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TILEGX_OPC_INFOL,
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TILEGX_OPC_MOVE,
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TILEGX_OPC_MOVEI,
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TILEGX_OPC_MOVELI,
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TILEGX_OPC_PREFETCH,
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TILEGX_OPC_PREFETCH_ADD_L1,
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TILEGX_OPC_PREFETCH_ADD_L1_FAULT,
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TILEGX_OPC_PREFETCH_ADD_L2,
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TILEGX_OPC_PREFETCH_ADD_L2_FAULT,
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TILEGX_OPC_PREFETCH_ADD_L3,
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TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
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TILEGX_OPC_PREFETCH_L1,
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TILEGX_OPC_PREFETCH_L1_FAULT,
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TILEGX_OPC_PREFETCH_L2,
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TILEGX_OPC_PREFETCH_L2_FAULT,
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TILEGX_OPC_PREFETCH_L3,
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TILEGX_OPC_PREFETCH_L3_FAULT,
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TILEGX_OPC_RAISE,
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TILEGX_OPC_ADD,
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TILEGX_OPC_ADDI,
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TILEGX_OPC_ADDLI,
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TILEGX_OPC_ADDX,
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TILEGX_OPC_ADDXI,
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TILEGX_OPC_ADDXLI,
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TILEGX_OPC_ADDXSC,
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TILEGX_OPC_AND,
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TILEGX_OPC_ANDI,
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TILEGX_OPC_BEQZ,
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TILEGX_OPC_BEQZT,
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TILEGX_OPC_BFEXTS,
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TILEGX_OPC_BFEXTU,
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TILEGX_OPC_BFINS,
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TILEGX_OPC_BGEZ,
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TILEGX_OPC_BGEZT,
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TILEGX_OPC_BGTZ,
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TILEGX_OPC_BGTZT,
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TILEGX_OPC_BLBC,
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TILEGX_OPC_BLBCT,
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TILEGX_OPC_BLBS,
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TILEGX_OPC_BLBST,
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TILEGX_OPC_BLEZ,
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TILEGX_OPC_BLEZT,
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TILEGX_OPC_BLTZ,
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TILEGX_OPC_BLTZT,
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TILEGX_OPC_BNEZ,
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TILEGX_OPC_BNEZT,
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TILEGX_OPC_CLZ,
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TILEGX_OPC_CMOVEQZ,
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TILEGX_OPC_CMOVNEZ,
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TILEGX_OPC_CMPEQ,
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TILEGX_OPC_CMPEQI,
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TILEGX_OPC_CMPEXCH,
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TILEGX_OPC_CMPEXCH4,
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TILEGX_OPC_CMPLES,
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TILEGX_OPC_CMPLEU,
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TILEGX_OPC_CMPLTS,
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TILEGX_OPC_CMPLTSI,
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TILEGX_OPC_CMPLTU,
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TILEGX_OPC_CMPLTUI,
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TILEGX_OPC_CMPNE,
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TILEGX_OPC_CMUL,
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TILEGX_OPC_CMULA,
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TILEGX_OPC_CMULAF,
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TILEGX_OPC_CMULF,
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TILEGX_OPC_CMULFR,
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TILEGX_OPC_CMULH,
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TILEGX_OPC_CMULHR,
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TILEGX_OPC_CRC32_32,
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TILEGX_OPC_CRC32_8,
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TILEGX_OPC_CTZ,
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TILEGX_OPC_DBLALIGN,
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TILEGX_OPC_DBLALIGN2,
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TILEGX_OPC_DBLALIGN4,
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TILEGX_OPC_DBLALIGN6,
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TILEGX_OPC_DRAIN,
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TILEGX_OPC_DTLBPR,
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TILEGX_OPC_EXCH,
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TILEGX_OPC_EXCH4,
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TILEGX_OPC_FDOUBLE_ADD_FLAGS,
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TILEGX_OPC_FDOUBLE_ADDSUB,
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TILEGX_OPC_FDOUBLE_MUL_FLAGS,
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TILEGX_OPC_FDOUBLE_PACK1,
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TILEGX_OPC_FDOUBLE_PACK2,
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TILEGX_OPC_FDOUBLE_SUB_FLAGS,
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TILEGX_OPC_FDOUBLE_UNPACK_MAX,
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TILEGX_OPC_FDOUBLE_UNPACK_MIN,
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TILEGX_OPC_FETCHADD,
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TILEGX_OPC_FETCHADD4,
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TILEGX_OPC_FETCHADDGEZ,
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TILEGX_OPC_FETCHADDGEZ4,
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TILEGX_OPC_FETCHAND,
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TILEGX_OPC_FETCHAND4,
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TILEGX_OPC_FETCHOR,
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TILEGX_OPC_FETCHOR4,
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TILEGX_OPC_FINV,
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TILEGX_OPC_FLUSH,
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TILEGX_OPC_FLUSHWB,
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TILEGX_OPC_FNOP,
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TILEGX_OPC_FSINGLE_ADD1,
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TILEGX_OPC_FSINGLE_ADDSUB2,
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TILEGX_OPC_FSINGLE_MUL1,
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TILEGX_OPC_FSINGLE_MUL2,
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TILEGX_OPC_FSINGLE_PACK1,
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TILEGX_OPC_FSINGLE_PACK2,
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TILEGX_OPC_FSINGLE_SUB1,
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TILEGX_OPC_ICOH,
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TILEGX_OPC_ILL,
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TILEGX_OPC_INV,
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TILEGX_OPC_IRET,
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TILEGX_OPC_J,
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TILEGX_OPC_JAL,
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TILEGX_OPC_JALR,
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TILEGX_OPC_JALRP,
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TILEGX_OPC_JR,
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TILEGX_OPC_JRP,
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TILEGX_OPC_LD,
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TILEGX_OPC_LD1S,
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TILEGX_OPC_LD1S_ADD,
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TILEGX_OPC_LD1U,
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TILEGX_OPC_LD1U_ADD,
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TILEGX_OPC_LD2S,
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TILEGX_OPC_LD2S_ADD,
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TILEGX_OPC_LD2U,
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TILEGX_OPC_LD2U_ADD,
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TILEGX_OPC_LD4S,
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TILEGX_OPC_LD4S_ADD,
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TILEGX_OPC_LD4U,
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TILEGX_OPC_LD4U_ADD,
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TILEGX_OPC_LD_ADD,
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TILEGX_OPC_LDNA,
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TILEGX_OPC_LDNA_ADD,
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TILEGX_OPC_LDNT,
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TILEGX_OPC_LDNT1S,
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TILEGX_OPC_LDNT1S_ADD,
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TILEGX_OPC_LDNT1U,
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TILEGX_OPC_LDNT1U_ADD,
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TILEGX_OPC_LDNT2S,
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TILEGX_OPC_LDNT2S_ADD,
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TILEGX_OPC_LDNT2U,
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TILEGX_OPC_LDNT2U_ADD,
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TILEGX_OPC_LDNT4S,
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TILEGX_OPC_LDNT4S_ADD,
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TILEGX_OPC_LDNT4U,
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TILEGX_OPC_LDNT4U_ADD,
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TILEGX_OPC_LDNT_ADD,
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TILEGX_OPC_LNK,
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TILEGX_OPC_MF,
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TILEGX_OPC_MFSPR,
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TILEGX_OPC_MM,
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TILEGX_OPC_MNZ,
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TILEGX_OPC_MTSPR,
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TILEGX_OPC_MUL_HS_HS,
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TILEGX_OPC_MUL_HS_HU,
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TILEGX_OPC_MUL_HS_LS,
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TILEGX_OPC_MUL_HS_LU,
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TILEGX_OPC_MUL_HU_HU,
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TILEGX_OPC_MUL_HU_LS,
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TILEGX_OPC_MUL_HU_LU,
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TILEGX_OPC_MUL_LS_LS,
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TILEGX_OPC_MUL_LS_LU,
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TILEGX_OPC_MUL_LU_LU,
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TILEGX_OPC_MULA_HS_HS,
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TILEGX_OPC_MULA_HS_HU,
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TILEGX_OPC_MULA_HS_LS,
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TILEGX_OPC_MULA_HS_LU,
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TILEGX_OPC_MULA_HU_HU,
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TILEGX_OPC_MULA_HU_LS,
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TILEGX_OPC_MULA_HU_LU,
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TILEGX_OPC_MULA_LS_LS,
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TILEGX_OPC_MULA_LS_LU,
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TILEGX_OPC_MULA_LU_LU,
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TILEGX_OPC_MULAX,
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TILEGX_OPC_MULX,
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TILEGX_OPC_MZ,
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TILEGX_OPC_NAP,
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TILEGX_OPC_NOP,
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TILEGX_OPC_NOR,
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TILEGX_OPC_OR,
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TILEGX_OPC_ORI,
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TILEGX_OPC_PCNT,
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TILEGX_OPC_REVBITS,
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TILEGX_OPC_REVBYTES,
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TILEGX_OPC_ROTL,
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TILEGX_OPC_ROTLI,
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TILEGX_OPC_SHL,
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TILEGX_OPC_SHL16INSLI,
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TILEGX_OPC_SHL1ADD,
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TILEGX_OPC_SHL1ADDX,
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TILEGX_OPC_SHL2ADD,
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TILEGX_OPC_SHL2ADDX,
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TILEGX_OPC_SHL3ADD,
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TILEGX_OPC_SHL3ADDX,
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TILEGX_OPC_SHLI,
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TILEGX_OPC_SHLX,
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TILEGX_OPC_SHLXI,
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TILEGX_OPC_SHRS,
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TILEGX_OPC_SHRSI,
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TILEGX_OPC_SHRU,
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TILEGX_OPC_SHRUI,
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TILEGX_OPC_SHRUX,
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TILEGX_OPC_SHRUXI,
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TILEGX_OPC_SHUFFLEBYTES,
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TILEGX_OPC_ST,
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TILEGX_OPC_ST1,
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TILEGX_OPC_ST1_ADD,
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TILEGX_OPC_ST2,
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TILEGX_OPC_ST2_ADD,
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TILEGX_OPC_ST4,
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TILEGX_OPC_ST4_ADD,
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TILEGX_OPC_ST_ADD,
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TILEGX_OPC_STNT,
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TILEGX_OPC_STNT1,
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TILEGX_OPC_STNT1_ADD,
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TILEGX_OPC_STNT2,
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TILEGX_OPC_STNT2_ADD,
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TILEGX_OPC_STNT4,
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TILEGX_OPC_STNT4_ADD,
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TILEGX_OPC_STNT_ADD,
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TILEGX_OPC_SUB,
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TILEGX_OPC_SUBX,
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TILEGX_OPC_SUBXSC,
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TILEGX_OPC_SWINT0,
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TILEGX_OPC_SWINT1,
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TILEGX_OPC_SWINT2,
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TILEGX_OPC_SWINT3,
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TILEGX_OPC_TBLIDXB0,
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TILEGX_OPC_TBLIDXB1,
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TILEGX_OPC_TBLIDXB2,
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TILEGX_OPC_TBLIDXB3,
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TILEGX_OPC_V1ADD,
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TILEGX_OPC_V1ADDI,
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TILEGX_OPC_V1ADDUC,
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TILEGX_OPC_V1ADIFFU,
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TILEGX_OPC_V1AVGU,
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TILEGX_OPC_V1CMPEQ,
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TILEGX_OPC_V1CMPEQI,
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TILEGX_OPC_V1CMPLES,
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TILEGX_OPC_V1CMPLEU,
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TILEGX_OPC_V1CMPLTS,
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TILEGX_OPC_V1CMPLTSI,
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TILEGX_OPC_V1CMPLTU,
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TILEGX_OPC_V1CMPLTUI,
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TILEGX_OPC_V1CMPNE,
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TILEGX_OPC_V1DDOTPU,
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TILEGX_OPC_V1DDOTPUA,
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TILEGX_OPC_V1DDOTPUS,
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TILEGX_OPC_V1DDOTPUSA,
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TILEGX_OPC_V1DOTP,
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TILEGX_OPC_V1DOTPA,
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TILEGX_OPC_V1DOTPU,
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TILEGX_OPC_V1DOTPUA,
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TILEGX_OPC_V1DOTPUS,
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TILEGX_OPC_V1DOTPUSA,
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TILEGX_OPC_V1INT_H,
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TILEGX_OPC_V1INT_L,
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TILEGX_OPC_V1MAXU,
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TILEGX_OPC_V1MAXUI,
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TILEGX_OPC_V1MINU,
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TILEGX_OPC_V1MINUI,
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TILEGX_OPC_V1MNZ,
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TILEGX_OPC_V1MULTU,
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TILEGX_OPC_V1MULU,
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TILEGX_OPC_V1MULUS,
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TILEGX_OPC_V1MZ,
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TILEGX_OPC_V1SADAU,
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TILEGX_OPC_V1SADU,
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TILEGX_OPC_V1SHL,
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TILEGX_OPC_V1SHLI,
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TILEGX_OPC_V1SHRS,
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TILEGX_OPC_V1SHRSI,
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TILEGX_OPC_V1SHRU,
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TILEGX_OPC_V1SHRUI,
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TILEGX_OPC_V1SUB,
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TILEGX_OPC_V1SUBUC,
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TILEGX_OPC_V2ADD,
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TILEGX_OPC_V2ADDI,
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TILEGX_OPC_V2ADDSC,
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TILEGX_OPC_V2ADIFFS,
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TILEGX_OPC_V2AVGS,
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TILEGX_OPC_V2CMPEQ,
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TILEGX_OPC_V2CMPEQI,
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TILEGX_OPC_V2CMPLES,
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TILEGX_OPC_V2CMPLEU,
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TILEGX_OPC_V2CMPLTS,
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TILEGX_OPC_V2CMPLTSI,
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TILEGX_OPC_V2CMPLTU,
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TILEGX_OPC_V2CMPLTUI,
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TILEGX_OPC_V2CMPNE,
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TILEGX_OPC_V2DOTP,
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TILEGX_OPC_V2DOTPA,
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TILEGX_OPC_V2INT_H,
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TILEGX_OPC_V2INT_L,
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TILEGX_OPC_V2MAXS,
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TILEGX_OPC_V2MAXSI,
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TILEGX_OPC_V2MINS,
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TILEGX_OPC_V2MINSI,
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TILEGX_OPC_V2MNZ,
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TILEGX_OPC_V2MULFSC,
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TILEGX_OPC_V2MULS,
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TILEGX_OPC_V2MULTS,
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TILEGX_OPC_V2MZ,
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TILEGX_OPC_V2PACKH,
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TILEGX_OPC_V2PACKL,
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TILEGX_OPC_V2PACKUC,
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TILEGX_OPC_V2SADAS,
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TILEGX_OPC_V2SADAU,
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TILEGX_OPC_V2SADS,
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TILEGX_OPC_V2SADU,
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TILEGX_OPC_V2SHL,
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TILEGX_OPC_V2SHLI,
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TILEGX_OPC_V2SHLSC,
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TILEGX_OPC_V2SHRS,
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TILEGX_OPC_V2SHRSI,
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TILEGX_OPC_V2SHRU,
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TILEGX_OPC_V2SHRUI,
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TILEGX_OPC_V2SUB,
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TILEGX_OPC_V2SUBSC,
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TILEGX_OPC_V4ADD,
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TILEGX_OPC_V4ADDSC,
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TILEGX_OPC_V4INT_H,
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TILEGX_OPC_V4INT_L,
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TILEGX_OPC_V4PACKSC,
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TILEGX_OPC_V4SHL,
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TILEGX_OPC_V4SHLSC,
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TILEGX_OPC_V4SHRS,
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TILEGX_OPC_V4SHRU,
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TILEGX_OPC_V4SUB,
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TILEGX_OPC_V4SUBSC,
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TILEGX_OPC_WH64,
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TILEGX_OPC_XOR,
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TILEGX_OPC_XORI,
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TILEGX_OPC_NONE
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} tilegx_mnemonic;
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typedef enum
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{
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TILEGX_PIPELINE_X0,
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TILEGX_PIPELINE_X1,
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TILEGX_PIPELINE_Y0,
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TILEGX_PIPELINE_Y1,
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TILEGX_PIPELINE_Y2,
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} tilegx_pipeline;
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#define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1)
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typedef enum
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{
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TILEGX_OP_TYPE_REGISTER,
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TILEGX_OP_TYPE_IMMEDIATE,
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TILEGX_OP_TYPE_ADDRESS,
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TILEGX_OP_TYPE_SPR
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} tilegx_operand_type;
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struct tilegx_operand
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{
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/* Is this operand a register, immediate or address? */
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tilegx_operand_type type;
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/* The default relocation type for this operand. */
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signed int default_reloc : 16;
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/* How many bits is this value? (used for range checking) */
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unsigned int num_bits : 5;
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/* Is the value signed? (used for range checking) */
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unsigned int is_signed : 1;
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/* Is this operand a source register? */
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unsigned int is_src_reg : 1;
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/* Is this operand written? (i.e. is it a destination register) */
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unsigned int is_dest_reg : 1;
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/* Is this operand PC-relative? */
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unsigned int is_pc_relative : 1;
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/* By how many bits do we right shift the value before inserting? */
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unsigned int rightshift : 2;
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/* Return the bits for this operand to be ORed into an existing bundle. */
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tilegx_bundle_bits (*insert) (int op);
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/* Extract this operand and return it. */
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unsigned int (*extract) (tilegx_bundle_bits bundle);
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};
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extern const struct tilegx_operand tilegx_operands[];
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/* One finite-state machine per pipe for rapid instruction decoding. */
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extern const unsigned short * const
|
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tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS];
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struct tilegx_opcode
|
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{
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/* The opcode mnemonic, e.g. "add" */
|
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const char *name;
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|
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/* The enum value for this mnemonic. */
|
|
tilegx_mnemonic mnemonic;
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|
|
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/* A bit mask of which of the five pipes this instruction
|
|
is compatible with:
|
|
X0 0x01
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X1 0x02
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|
Y0 0x04
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|
Y1 0x08
|
|
Y2 0x10 */
|
|
unsigned char pipes;
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|
|
|
/* How many operands are there? */
|
|
unsigned char num_operands;
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|
|
|
/* Which register does this write implicitly, or TREG_ZERO if none? */
|
|
unsigned char implicitly_written_register;
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|
|
|
/* Can this be bundled with other instructions (almost always true). */
|
|
unsigned char can_bundle;
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|
|
|
/* The description of the operands. Each of these is an
|
|
* index into the tilegx_operands[] table. */
|
|
unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS];
|
|
|
|
};
|
|
|
|
extern const struct tilegx_opcode tilegx_opcodes[];
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|
|
|
/* Used for non-textual disassembly into structs. */
|
|
struct tilegx_decoded_instruction
|
|
{
|
|
const struct tilegx_opcode *opcode;
|
|
const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS];
|
|
long long operand_values[TILEGX_MAX_OPERANDS];
|
|
};
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|
|
|
|
|
/* Disassemble a bundle into a struct for machine processing. */
|
|
extern int parse_insn_tilegx(tilegx_bundle_bits bits,
|
|
unsigned long long pc,
|
|
struct tilegx_decoded_instruction
|
|
decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]);
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#endif /* opcode_tilegx_h */
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