![Thara Gopinath](/assets/img/avatar_default.png)
This patch adds counters to keep track of whether the powerdomain logic or software controllable memory banks are turned off when the power domain enters retention. During power domain retention if logic gets turned off, the scenario is known as Open Switch Retention. Also during retention s/w controllable memory banks of a power domain can be chosen to be kept in retention or off. This patch adds one counter per powerdomain to track the power domain logic state during retention. Number of memory bank state counters added depends on the number of software controllable memory banks of the powerdomain. To view these counters do cat ../debug/pm_debug/count Signed-off-by: Thara Gopinath <thara@ti.com> [paul@pwsan.com: conditional expressions simplified; counter increment code moved to its own function] Signed-off-by: Paul Walmsley <paul@pwsan.com>
615 lines
14 KiB
C
615 lines
14 KiB
C
/*
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* OMAP Power Management debug routines
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*
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* Copyright (C) 2005 Texas Instruments, Inc.
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* Copyright (C) 2006-2008 Nokia Corporation
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*
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* Written by:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Tony Lindgren
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* Juha Yrjola
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* Amit Kucheria <amit.kucheria@nokia.com>
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* Igor Stoppa <igor.stoppa@nokia.com>
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* Jouni Hogander
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*
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* Based on pm.c for omap2
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <plat/clock.h>
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#include <plat/board.h>
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#include <plat/powerdomain.h>
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#include <plat/clockdomain.h>
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#include "prm.h"
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#include "cm.h"
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#include "pm.h"
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int omap2_pm_debug;
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#define DUMP_PRM_MOD_REG(mod, reg) \
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regs[reg_count].name = #mod "." #reg; \
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regs[reg_count++].val = prm_read_mod_reg(mod, reg)
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#define DUMP_CM_MOD_REG(mod, reg) \
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regs[reg_count].name = #mod "." #reg; \
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regs[reg_count++].val = cm_read_mod_reg(mod, reg)
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#define DUMP_PRM_REG(reg) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(reg)
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#define DUMP_CM_REG(reg) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(reg)
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#define DUMP_INTC_REG(reg, off) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = \
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__raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
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void omap2_pm_dump(int mode, int resume, unsigned int us)
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{
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struct reg {
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const char *name;
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u32 val;
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} regs[32];
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int reg_count = 0, i;
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const char *s1 = NULL, *s2 = NULL;
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if (!resume) {
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#if 0
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/* MPU */
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DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
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DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL);
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DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL);
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DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST);
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DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP);
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#endif
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#if 0
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/* INTC */
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DUMP_INTC_REG(INTC_MIR0, 0x0084);
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DUMP_INTC_REG(INTC_MIR1, 0x00a4);
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DUMP_INTC_REG(INTC_MIR2, 0x00c4);
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#endif
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#if 0
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DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
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if (cpu_is_omap24xx()) {
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DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
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DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
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OMAP2_PRCM_CLKEMUL_CTRL_OFFSET);
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DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
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OMAP2_PRCM_CLKSRC_CTRL_OFFSET);
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}
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DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
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DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
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DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
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DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
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DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
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DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
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DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST);
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#endif
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#if 0
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/* DSP */
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if (cpu_is_omap24xx()) {
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST);
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}
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#endif
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} else {
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DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
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if (cpu_is_omap24xx())
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DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
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DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
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DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
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#if 1
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DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
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DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
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DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8);
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#endif
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}
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switch (mode) {
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case 0:
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s1 = "full";
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s2 = "retention";
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break;
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case 1:
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s1 = "MPU";
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s2 = "retention";
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break;
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case 2:
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s1 = "MPU";
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s2 = "idle";
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break;
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}
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if (!resume)
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#ifdef CONFIG_NO_HZ
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printk(KERN_INFO
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"--- Going to %s %s (next timer after %u ms)\n", s1, s2,
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jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
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jiffies));
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#else
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printk(KERN_INFO "--- Going to %s %s\n", s1, s2);
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#endif
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else
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printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n",
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us / 1000, us % 1000);
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for (i = 0; i < reg_count; i++)
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printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
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}
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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static void pm_dbg_regset_store(u32 *ptr);
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struct dentry *pm_dbg_dir;
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static int pm_dbg_init_done;
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static int __init pm_dbg_init(void);
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enum {
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DEBUG_FILE_COUNTERS = 0,
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DEBUG_FILE_TIMERS,
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};
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struct pm_module_def {
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char name[8]; /* Name of the module */
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short type; /* CM or PRM */
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unsigned short offset;
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int low; /* First register address on this module */
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int high; /* Last register address on this module */
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};
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#define MOD_CM 0
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#define MOD_PRM 1
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static const struct pm_module_def *pm_dbg_reg_modules;
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static const struct pm_module_def omap3_pm_reg_modules[] = {
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{ "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
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{ "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
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{ "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
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{ "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
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{ "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
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{ "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
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{ "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
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{ "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
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{ "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
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{ "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
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{ "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
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{ "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
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{ "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
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{ "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
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{ "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
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{ "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
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{ "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
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{ "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
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{ "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
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{ "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
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{ "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
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{ "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
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{ "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
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{ "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
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{ "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
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{ "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
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{ "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
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{ "", 0, 0, 0, 0 },
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};
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#define PM_DBG_MAX_REG_SETS 4
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static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
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static int pm_dbg_get_regset_size(void)
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{
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static int regset_size;
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if (regset_size == 0) {
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int i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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regset_size += pm_dbg_reg_modules[i].high +
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4 - pm_dbg_reg_modules[i].low;
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i++;
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}
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}
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return regset_size;
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}
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static int pm_dbg_show_regs(struct seq_file *s, void *unused)
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{
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int i, j;
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unsigned long val;
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int reg_set = (int)s->private;
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u32 *ptr;
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void *store = NULL;
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int regs;
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int linefeed;
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if (reg_set == 0) {
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store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
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ptr = store;
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pm_dbg_regset_store(ptr);
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} else {
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ptr = pm_dbg_reg_set[reg_set - 1];
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}
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i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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regs = 0;
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linefeed = 0;
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if (pm_dbg_reg_modules[i].type == MOD_CM)
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seq_printf(s, "MOD: CM_%s (%08x)\n",
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pm_dbg_reg_modules[i].name,
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(u32)(OMAP3430_CM_BASE +
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pm_dbg_reg_modules[i].offset));
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else
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seq_printf(s, "MOD: PRM_%s (%08x)\n",
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pm_dbg_reg_modules[i].name,
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(u32)(OMAP3430_PRM_BASE +
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pm_dbg_reg_modules[i].offset));
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for (j = pm_dbg_reg_modules[i].low;
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j <= pm_dbg_reg_modules[i].high; j += 4) {
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val = *(ptr++);
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if (val != 0) {
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regs++;
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if (linefeed) {
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seq_printf(s, "\n");
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linefeed = 0;
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}
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seq_printf(s, " %02x => %08lx", j, val);
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if (regs % 4 == 0)
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linefeed = 1;
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}
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}
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seq_printf(s, "\n");
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i++;
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}
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if (store != NULL)
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kfree(store);
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return 0;
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}
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static void pm_dbg_regset_store(u32 *ptr)
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{
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int i, j;
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u32 val;
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i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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for (j = pm_dbg_reg_modules[i].low;
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j <= pm_dbg_reg_modules[i].high; j += 4) {
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if (pm_dbg_reg_modules[i].type == MOD_CM)
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val = cm_read_mod_reg(
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pm_dbg_reg_modules[i].offset, j);
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else
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val = prm_read_mod_reg(
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pm_dbg_reg_modules[i].offset, j);
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*(ptr++) = val;
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}
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i++;
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}
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}
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int pm_dbg_regset_save(int reg_set)
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{
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if (pm_dbg_reg_set[reg_set-1] == NULL)
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return -EINVAL;
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pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
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return 0;
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}
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static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = {
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"OFF",
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"RET",
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"INA",
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"ON"
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};
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void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
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{
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s64 t;
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if (!pm_dbg_init_done)
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return ;
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/* Update timer for previous state */
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t = sched_clock();
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pwrdm->state_timer[prev] += t - pwrdm->timer;
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pwrdm->timer = t;
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}
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static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
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strcmp(clkdm->name, "wkup_clkdm") == 0 ||
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strncmp(clkdm->name, "dpll", 4) == 0)
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return 0;
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seq_printf(s, "%s->%s (%d)", clkdm->name,
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clkdm->pwrdm.ptr->name,
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atomic_read(&clkdm->usecount));
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seq_printf(s, "\n");
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return 0;
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}
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static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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int i;
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if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
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strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
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strncmp(pwrdm->name, "dpll", 4) == 0)
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return 0;
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if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
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printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
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pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));
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seq_printf(s, "%s (%s)", pwrdm->name,
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pwrdm_state_names[pwrdm->state]);
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for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
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seq_printf(s, ",%s:%d", pwrdm_state_names[i],
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pwrdm->state_counter[i]);
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seq_printf(s, ",RET-LOGIC-OFF:%d", pwrdm->ret_logic_off_counter);
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for (i = 0; i < pwrdm->banks; i++)
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seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1,
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pwrdm->ret_mem_off_counter[i]);
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seq_printf(s, "\n");
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return 0;
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}
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static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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int i;
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if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
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strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
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strncmp(pwrdm->name, "dpll", 4) == 0)
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return 0;
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pwrdm_state_switch(pwrdm);
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seq_printf(s, "%s (%s)", pwrdm->name,
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pwrdm_state_names[pwrdm->state]);
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for (i = 0; i < 4; i++)
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seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
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pwrdm->state_timer[i]);
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seq_printf(s, "\n");
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return 0;
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}
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static int pm_dbg_show_counters(struct seq_file *s, void *unused)
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{
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pwrdm_for_each(pwrdm_dbg_show_counter, s);
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clkdm_for_each(clkdm_dbg_show_counter, s);
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return 0;
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}
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static int pm_dbg_show_timers(struct seq_file *s, void *unused)
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{
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pwrdm_for_each(pwrdm_dbg_show_timer, s);
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return 0;
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}
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static int pm_dbg_open(struct inode *inode, struct file *file)
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{
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switch ((int)inode->i_private) {
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case DEBUG_FILE_COUNTERS:
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return single_open(file, pm_dbg_show_counters,
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&inode->i_private);
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case DEBUG_FILE_TIMERS:
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default:
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return single_open(file, pm_dbg_show_timers,
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&inode->i_private);
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};
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|
}
|
|
|
|
static int pm_dbg_reg_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, pm_dbg_show_regs, inode->i_private);
|
|
}
|
|
|
|
static const struct file_operations debug_fops = {
|
|
.open = pm_dbg_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
static const struct file_operations debug_reg_fops = {
|
|
.open = pm_dbg_reg_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
int pm_dbg_regset_init(int reg_set)
|
|
{
|
|
char name[2];
|
|
|
|
if (!pm_dbg_init_done)
|
|
pm_dbg_init();
|
|
|
|
if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
|
|
pm_dbg_reg_set[reg_set-1] != NULL)
|
|
return -EINVAL;
|
|
|
|
pm_dbg_reg_set[reg_set-1] =
|
|
kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
|
|
|
|
if (pm_dbg_reg_set[reg_set-1] == NULL)
|
|
return -ENOMEM;
|
|
|
|
if (pm_dbg_dir != NULL) {
|
|
sprintf(name, "%d", reg_set);
|
|
|
|
(void) debugfs_create_file(name, S_IRUGO,
|
|
pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pwrdm_suspend_get(void *data, u64 *val)
|
|
{
|
|
int ret;
|
|
ret = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
|
*val = ret;
|
|
|
|
if (ret >= 0)
|
|
return 0;
|
|
return *val;
|
|
}
|
|
|
|
static int pwrdm_suspend_set(void *data, u64 val)
|
|
{
|
|
return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
|
|
}
|
|
|
|
DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
|
|
pwrdm_suspend_set, "%llu\n");
|
|
|
|
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
|
|
{
|
|
int i;
|
|
s64 t;
|
|
struct dentry *d;
|
|
|
|
t = sched_clock();
|
|
|
|
for (i = 0; i < 4; i++)
|
|
pwrdm->state_timer[i] = 0;
|
|
|
|
pwrdm->timer = t;
|
|
|
|
if (strncmp(pwrdm->name, "dpll", 4) == 0)
|
|
return 0;
|
|
|
|
d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
|
|
|
|
(void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
|
|
(void *)pwrdm, &pwrdm_suspend_fops);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int option_get(void *data, u64 *val)
|
|
{
|
|
u32 *option = data;
|
|
|
|
*val = *option;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int option_set(void *data, u64 val)
|
|
{
|
|
u32 *option = data;
|
|
|
|
*option = val;
|
|
|
|
if (option == &enable_off_mode)
|
|
omap3_pm_off_mode_enable(val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n");
|
|
|
|
static int __init pm_dbg_init(void)
|
|
{
|
|
int i;
|
|
struct dentry *d;
|
|
char name[2];
|
|
|
|
if (pm_dbg_init_done)
|
|
return 0;
|
|
|
|
if (cpu_is_omap34xx())
|
|
pm_dbg_reg_modules = omap3_pm_reg_modules;
|
|
else {
|
|
printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
d = debugfs_create_dir("pm_debug", NULL);
|
|
if (IS_ERR(d))
|
|
return PTR_ERR(d);
|
|
|
|
(void) debugfs_create_file("count", S_IRUGO,
|
|
d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
|
|
(void) debugfs_create_file("time", S_IRUGO,
|
|
d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
|
|
|
|
pwrdm_for_each(pwrdms_setup, (void *)d);
|
|
|
|
pm_dbg_dir = debugfs_create_dir("registers", d);
|
|
if (IS_ERR(pm_dbg_dir))
|
|
return PTR_ERR(pm_dbg_dir);
|
|
|
|
(void) debugfs_create_file("current", S_IRUGO,
|
|
pm_dbg_dir, (void *)0, &debug_reg_fops);
|
|
|
|
for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
|
|
if (pm_dbg_reg_set[i] != NULL) {
|
|
sprintf(name, "%d", i+1);
|
|
(void) debugfs_create_file(name, S_IRUGO,
|
|
pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
|
|
|
|
}
|
|
|
|
(void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d,
|
|
&enable_off_mode, &pm_dbg_option_fops);
|
|
(void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d,
|
|
&sleep_while_idle, &pm_dbg_option_fops);
|
|
(void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d,
|
|
&wakeup_timer_seconds, &pm_dbg_option_fops);
|
|
pm_dbg_init_done = 1;
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(pm_dbg_init);
|
|
|
|
#endif
|