![Laurent Pinchart](/assets/img/avatar_default.png)
Pinmux information should be provided by the pinmux driver, not arch code. Make it possible to do so by supporting pinmux information passed through the driver_data field in the platform ID table. Platform data will remain supported until all arch code has been converted. Rename the sh_pfc_platform_data structure to sh_pfc_soc_info to reflect this. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
465 lines
11 KiB
C
465 lines
11 KiB
C
/*
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* SuperH Pin Function Controller pinmux support.
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*
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* Copyright (C) 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "sh-pfc"
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#define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/sh_pfc.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "core.h"
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struct sh_pfc_pinctrl {
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struct pinctrl_dev *pctl;
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struct sh_pfc *pfc;
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struct pinmux_gpio **functions;
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unsigned int nr_functions;
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struct pinctrl_pin_desc *pads;
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unsigned int nr_pads;
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spinlock_t lock;
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};
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static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_pads;
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}
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static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->pads[selector].name;
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}
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static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
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const unsigned **pins, unsigned *num_pins)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pmx->pads[group].number;
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*num_pins = 1;
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return 0;
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}
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static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, "%s", DRV_NAME);
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}
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static struct pinctrl_ops sh_pfc_pinctrl_ops = {
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.get_groups_count = sh_pfc_get_groups_count,
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.get_group_name = sh_pfc_get_group_name,
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.get_group_pins = sh_pfc_get_group_pins,
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.pin_dbg_show = sh_pfc_pin_dbg_show,
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};
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static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_functions;
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}
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static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->functions[selector]->name;
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}
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static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*groups = &pmx->functions[func]->name;
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*num_groups = 1;
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return 0;
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}
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static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
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unsigned group)
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{
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return 0;
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}
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static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
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unsigned group)
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{
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}
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static int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
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{
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if (sh_pfc_config_gpio(pfc, offset,
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PINMUX_TYPE_FUNCTION,
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GPIO_CFG_DRYRUN) != 0)
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return -EINVAL;
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if (sh_pfc_config_gpio(pfc, offset,
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PINMUX_TYPE_FUNCTION,
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GPIO_CFG_REQ) != 0)
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return -EINVAL;
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return 0;
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}
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static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
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int new_type)
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{
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unsigned long flags;
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int pinmux_type;
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int ret = -EINVAL;
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
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/*
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* See if the present config needs to first be de-configured.
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*/
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switch (pinmux_type) {
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case PINMUX_TYPE_GPIO:
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break;
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case PINMUX_TYPE_OUTPUT:
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case PINMUX_TYPE_INPUT:
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case PINMUX_TYPE_INPUT_PULLUP:
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case PINMUX_TYPE_INPUT_PULLDOWN:
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sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
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break;
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default:
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goto err;
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}
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/*
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* Dry run
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*/
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if (sh_pfc_config_gpio(pfc, offset, new_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err;
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/*
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* Request
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*/
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if (sh_pfc_config_gpio(pfc, offset, new_type,
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GPIO_CFG_REQ) != 0)
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goto err;
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pfc->info->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->info->gpios[offset].flags |= new_type;
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ret = 0;
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err:
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
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static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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unsigned long flags;
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int ret, pinmux_type;
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
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pr_notice_once("Use of GPIO API for function requests is "
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"deprecated, convert to pinctrl\n");
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/* handle for now */
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ret = sh_pfc_config_function(pfc, offset);
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if (unlikely(ret < 0))
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goto err;
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break;
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case PINMUX_TYPE_GPIO:
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case PINMUX_TYPE_INPUT:
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case PINMUX_TYPE_OUTPUT:
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break;
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default:
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pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
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ret = -ENOTSUPP;
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goto err;
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}
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ret = 0;
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err:
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
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static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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unsigned long flags;
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int pinmux_type;
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
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sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
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spin_unlock_irqrestore(&pfc->lock, flags);
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}
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static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset, bool input)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
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return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
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}
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static struct pinmux_ops sh_pfc_pinmux_ops = {
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.get_functions_count = sh_pfc_get_functions_count,
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.get_function_name = sh_pfc_get_function_name,
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.get_function_groups = sh_pfc_get_function_groups,
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.enable = sh_pfc_noop_enable,
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.disable = sh_pfc_noop_disable,
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.gpio_request_enable = sh_pfc_gpio_request_enable,
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.gpio_disable_free = sh_pfc_gpio_disable_free,
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.gpio_set_direction = sh_pfc_gpio_set_direction,
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};
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static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long *config)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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*config = pfc->info->gpios[pin].flags & PINMUX_FLAG_TYPE;
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return 0;
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}
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static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long config)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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/* Validate the new type */
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if (config >= PINMUX_FLAG_TYPE)
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return -EINVAL;
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return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
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}
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static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned pin)
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{
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const char *pinmux_type_str[] = {
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[PINMUX_TYPE_NONE] = "none",
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[PINMUX_TYPE_FUNCTION] = "function",
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[PINMUX_TYPE_GPIO] = "gpio",
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[PINMUX_TYPE_OUTPUT] = "output",
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[PINMUX_TYPE_INPUT] = "input",
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[PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
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[PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
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};
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unsigned long config;
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int rc;
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rc = sh_pfc_pinconf_get(pctldev, pin, &config);
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if (unlikely(rc != 0))
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return;
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seq_printf(s, " %s", pinmux_type_str[config]);
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}
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static struct pinconf_ops sh_pfc_pinconf_ops = {
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.pin_config_get = sh_pfc_pinconf_get,
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.pin_config_set = sh_pfc_pinconf_set,
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.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
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};
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static struct pinctrl_gpio_range sh_pfc_gpio_range = {
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.name = DRV_NAME,
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.id = 0,
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};
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static struct pinctrl_desc sh_pfc_pinctrl_desc = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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.pctlops = &sh_pfc_pinctrl_ops,
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.pmxops = &sh_pfc_pinmux_ops,
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.confops = &sh_pfc_pinconf_ops,
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};
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static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
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struct pinmux_gpio *gpio, unsigned offset)
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{
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struct pinmux_data_reg *dummy;
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unsigned long flags;
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int bit;
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gpio->flags &= ~PINMUX_FLAG_TYPE;
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if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
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gpio->flags |= PINMUX_TYPE_GPIO;
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else {
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gpio->flags |= PINMUX_TYPE_FUNCTION;
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spin_lock_irqsave(&pmx->lock, flags);
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pmx->nr_functions++;
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spin_unlock_irqrestore(&pmx->lock, flags);
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}
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}
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/* pinmux ranges -> pinctrl pin descs */
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static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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{
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unsigned long flags;
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int i;
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pmx->nr_pads = pfc->info->last_gpio - pfc->info->first_gpio + 1;
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pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
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GFP_KERNEL);
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if (unlikely(!pmx->pads)) {
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pmx->nr_pads = 0;
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return -ENOMEM;
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}
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spin_lock_irqsave(&pfc->lock, flags);
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/*
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* We don't necessarily have a 1:1 mapping between pin and linux
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* GPIO number, as the latter maps to the associated enum_id.
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* Care needs to be taken to translate back to pin space when
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* dealing with any pin configurations.
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*/
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for (i = 0; i < pmx->nr_pads; i++) {
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struct pinctrl_pin_desc *pin = pmx->pads + i;
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struct pinmux_gpio *gpio = pfc->info->gpios + i;
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pin->number = pfc->info->first_gpio + i;
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pin->name = gpio->name;
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/* XXX */
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if (unlikely(!gpio->enum_id))
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continue;
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sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
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}
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spin_unlock_irqrestore(&pfc->lock, flags);
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sh_pfc_pinctrl_desc.pins = pmx->pads;
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sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
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return 0;
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}
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static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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{
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unsigned long flags;
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int i, fn;
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pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
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sizeof(*pmx->functions), GFP_KERNEL);
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if (unlikely(!pmx->functions))
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return -ENOMEM;
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spin_lock_irqsave(&pmx->lock, flags);
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for (i = fn = 0; i < pmx->nr_pads; i++) {
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struct pinmux_gpio *gpio = pfc->info->gpios + i;
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if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
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pmx->functions[fn++] = gpio;
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}
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spin_unlock_irqrestore(&pmx->lock, flags);
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return 0;
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}
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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{
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struct sh_pfc_pinctrl *pmx;
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int ret;
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pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
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if (unlikely(!pmx))
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return -ENOMEM;
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spin_lock_init(&pmx->lock);
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pmx->pfc = pfc;
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pfc->pinctrl = pmx;
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ret = sh_pfc_map_gpios(pfc, pmx);
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if (unlikely(ret != 0))
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return ret;
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ret = sh_pfc_map_functions(pfc, pmx);
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if (unlikely(ret != 0))
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return ret;
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pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx);
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if (IS_ERR(pmx->pctl))
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return PTR_ERR(pmx->pctl);
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sh_pfc_gpio_range.npins = pfc->info->last_gpio
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- pfc->info->first_gpio + 1;
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sh_pfc_gpio_range.base = pfc->info->first_gpio;
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sh_pfc_gpio_range.pin_base = pfc->info->first_gpio;
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pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
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return 0;
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}
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int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
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{
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struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
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pinctrl_unregister(pmx->pctl);
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pfc->pinctrl = NULL;
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return 0;
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}
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