701190fd74
Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and SPI controllers. For most of these there is a configuration register that allows software to enable and disable the functional clock. Disabling the clock while the peripheral is not used saves power. In order to take advantage of this we add a new clock gate of type lpss_gate that just re-uses the ordinary clk_gate but in addition is able to enumerate the base address register of the device using ACPI. We then create a clock tree that models the Lynxpoint LPSS clocks using these gates and fixed clocks so that we can pass clock rate to the drivers as well. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
37 lines
930 B
C
37 lines
930 B
C
/*
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* Intel Low Power Subsystem clock.
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*
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* Copyright (C) 2013, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Heikki Krogerus <heikki.krogerus@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __CLK_LPSS_H
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#define __CLK_LPSS_H
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#ifdef CONFIG_ACPI
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extern struct clk *clk_register_lpss_gate(const char *name,
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const char *parent_name,
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const char *hid, const char *uid,
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unsigned offset);
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#else
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static inline struct clk *clk_register_lpss_gate(const char *name,
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const char *parent_name,
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const char *hid,
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const char *uid,
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unsigned offset)
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{
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return ERR_PTR(-ENODEV);
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}
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#endif
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#endif /* __CLK_LPSS_H */
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