701190fd74
Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and SPI controllers. For most of these there is a configuration register that allows software to enable and disable the functional clock. Disabling the clock while the peripheral is not used saves power. In order to take advantage of this we add a new clock gate of type lpss_gate that just re-uses the ordinary clk_gate but in addition is able to enumerate the base address register of the device using ACPI. We then create a clock tree that models the Lynxpoint LPSS clocks using these gates and fixed clocks so that we can pass clock rate to the drivers as well. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
87 lines
2.2 KiB
C
87 lines
2.2 KiB
C
/*
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* Intel Lynxpoint LPSS clocks.
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*
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* Copyright (C) 2013, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Heikki Krogerus <heikki.krogerus@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include "clk-lpss.h"
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#define PRV_CLOCK_PARAMS 0x800
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static int lpt_clk_probe(struct platform_device *pdev)
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{
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struct clk *clk;
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/* LPSS free running clock */
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clk = clk_register_fixed_rate(&pdev->dev, "lpss_clk", NULL, CLK_IS_ROOT,
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100000000);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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/* Shared DMA clock */
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clk_register_clkdev(clk, "hclk", "INTL9C60.0.auto");
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/* SPI clocks */
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clk = clk_register_lpss_gate("spi0_clk", "lpss_clk", "INT33C0", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C0:00");
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clk = clk_register_lpss_gate("spi1_clk", "lpss_clk", "INT33C1", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C1:00");
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/* I2C clocks */
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clk = clk_register_lpss_gate("i2c0_clk", "lpss_clk", "INT33C2", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C2:00");
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clk = clk_register_lpss_gate("i2c1_clk", "lpss_clk", "INT33C3", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C3:00");
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/* UART clocks */
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clk = clk_register_lpss_gate("uart0_clk", "lpss_clk", "INT33C4", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C4:00");
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clk = clk_register_lpss_gate("uart1_clk", "lpss_clk", "INT33C5", NULL,
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PRV_CLOCK_PARAMS);
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, NULL, "INT33C5:00");
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return 0;
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}
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static struct platform_driver lpt_clk_driver = {
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.driver = {
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.name = "clk-lpt",
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.owner = THIS_MODULE,
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},
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.probe = lpt_clk_probe,
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};
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static int __init lpt_clk_init(void)
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{
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return platform_driver_register(&lpt_clk_driver);
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}
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arch_initcall(lpt_clk_init);
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