dc7a12bdfc
Converts ARM the text files to ReST, preparing them to be an architecture book. The conversion is actually: - add blank lines and identation in order to identify paragraphs; - fix tables markups; - add some lists markups; - mark literal blocks; - adjust title markups. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Reviewed-by Corentin Labbe <clabbe.montjoie@gmail.com> # For sun4i-ss
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1.2 KiB
ReStructuredText
28 lines
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ReStructuredText
Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
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---------------------------------------------------------------------
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ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
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moving to the load-locked/store-conditional instructions LDREX and STREX.
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ARMv7 multiprocessing extensions introduce the ability to disable these
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instructions, triggering an undefined instruction exception when executed.
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Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
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sequence. If a memory access fault (an abort) occurs, a segmentation fault is
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signalled to the triggering process.
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/proc/cpu/swp_emulation holds some statistics/information, including the PID of
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the last process to trigger the emulation to be invocated. For example::
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Emulated SWP: 12
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Emulated SWPB: 0
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Aborted SWP{B}: 1
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Last process: 314
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NOTE:
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when accessing uncached shared regions, LDREX/STREX rely on an external
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transaction monitoring block called a global monitor to maintain update
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atomicity. If your system does not implement a global monitor, this option can
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cause programs that perform SWP operations to uncached memory to deadlock, as
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the STREX operation will always fail.
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