Thierry Reding bb034cb5eb ARM: tegra: Enable PCIe controller on Beaver ... PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and lane 4 is routed to the board's miniPCIe slot. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>		2013-08-12 14:20:22 -06:00
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bootp	ARM: 6499/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in bootp/init.S	2010-11-30 13:44:24 +00:00
compressed	arm: add support for LZ4-compressed kernel	2013-07-09 10:33:30 -07:00
dts	ARM: tegra: Enable PCIe controller on Beaver	2013-08-12 14:20:22 -06:00
.gitignore	ARM: devicetree: Add .dtb files to arch/arm/boot/.gitignore	2012-01-30 11:47:37 -07:00
install.sh	kbuild: use INSTALLKERNEL to select customized installkernel script	2009-09-20 12:18:14 +02:00
Makefile	ARM: dts: remove generated .dtb files on clean	2013-03-04 17:15:35 -08:00