9e1b32caa5
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
112 lines
2.7 KiB
C
112 lines
2.7 KiB
C
/*
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* arch/arm/include/asm/tlb.h
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*
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* Copyright (C) 2002 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Experimentation shows that on a StrongARM, it appears to be faster
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* to use the "invalidate whole tlb" rather than "invalidate single
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* tlb" for this.
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*
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* This appears true for both the process fork+exit case, as well as
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* the munmap-large-area case.
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*/
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#ifndef __ASMARM_TLB_H
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#define __ASMARM_TLB_H
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#ifndef CONFIG_MMU
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#include <linux/pagemap.h>
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#include <asm-generic/tlb.h>
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#else /* !CONFIG_MMU */
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#include <asm/pgalloc.h>
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/*
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* TLB handling. This allows us to remove pages from the page
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* tables, and efficiently handle the TLB issues.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int fullmm;
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unsigned long range_start;
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unsigned long range_end;
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};
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DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
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static inline struct mmu_gather *
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tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
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{
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struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
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tlb->mm = mm;
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tlb->fullmm = full_mm_flush;
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return tlb;
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}
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static inline void
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tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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if (tlb->fullmm)
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flush_tlb_mm(tlb->mm);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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put_cpu_var(mmu_gathers);
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}
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/*
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* Memorize the range for the TLB flush.
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*/
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static inline void
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tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
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{
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if (!tlb->fullmm) {
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if (addr < tlb->range_start)
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tlb->range_start = addr;
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if (addr + PAGE_SIZE > tlb->range_end)
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tlb->range_end = addr + PAGE_SIZE;
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}
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}
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
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* the vmas are adjusted to only cover the region to be torn down.
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*/
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static inline void
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tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm) {
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flush_cache_range(vma, vma->vm_start, vma->vm_end);
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tlb->range_start = TASK_SIZE;
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tlb->range_end = 0;
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}
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}
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static inline void
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tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm && tlb->range_end > 0)
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flush_tlb_range(vma, tlb->range_start, tlb->range_end);
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}
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#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page)
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#define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep)
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#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp)
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#define tlb_migrate_finish(mm) do { } while (0)
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#endif /* CONFIG_MMU */
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#endif
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