9ee27c7639
This is a patch related to this discussion. http://www.spinics.net/lists/linux-ia64/msg07605.html When INIT is sent, ip/psr/pfs register is stored to the I-resources (iip/ipsr/ifs registers), and they are copied in the min-state save area(pmsa_{iip,ipsr,ifs}). Therefore, in creating pt_regs at ia64_mca_modify_original_stack(), cr_{iip,ipsr,ifs} should be derived from pmsa_{iip,ipsr,ifs}. But current code copies pmsa_{xip,xpsr,xfs} to cr_{iip,ipsr,ifs} when PSR.ic is 0. finish_pt_regs(struct pt_regs *regs, const pal_min_state_area_t *ms, unsigned long *nat) { (snip) if (ia64_psr(regs)->ic) { regs->cr_iip = ms->pmsa_iip; regs->cr_ipsr = ms->pmsa_ipsr; regs->cr_ifs = ms->pmsa_ifs; } else { regs->cr_iip = ms->pmsa_xip; regs->cr_ipsr = ms->pmsa_xpsr; regs->cr_ifs = ms->pmsa_xfs; } It's ok when PSR.ic is not 0. But when PSR.ic is 0, this could be a problem when we investigate kernel as the value of regs->cr_iip does not point to where INIT really interrupted. At first I tried to change finish_pt_regs() so that it uses always pmsa_{iip,ipsr,ifs} for cr_{iip,ipsr,ifs}, but Keith Owens pointed out it could cause another problem if I change it. >The only problem I can think of is an MCA/INIT >arriving while code like SAVE_MIN or SAVE_REST is executing. Back >tracing at that point using pmsa_iip is going to be a problem, you have >no idea what state the registers or stack are in. I confirmed he was right, so I decided to keep it as-is and to save pmsa_{iip,ipsr,ifs} to ia64_sal_os_state for debugging. An attached patch is just adding new members into ia64_sal_os_state to save pmsa_{iip,ipsr,ifs}. Signed-off-by: Takao Indoh <indou.takao@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
187 lines
5.8 KiB
C
187 lines
5.8 KiB
C
/*
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* File: mca.h
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* Purpose: Machine check handling specific defines
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*
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* Copyright (C) 1999, 2004 Silicon Graphics, Inc.
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* Copyright (C) Vijay Chander <vijay@engr.sgi.com>
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* Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
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* Copyright (C) Russ Anderson <rja@sgi.com>
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*/
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#ifndef _ASM_IA64_MCA_H
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#define _ASM_IA64_MCA_H
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#if !defined(__ASSEMBLY__)
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <asm/param.h>
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#include <asm/sal.h>
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#include <asm/processor.h>
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#include <asm/mca_asm.h>
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#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
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typedef struct ia64_fptr {
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unsigned long fp;
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unsigned long gp;
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} ia64_fptr_t;
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typedef union cmcv_reg_u {
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u64 cmcv_regval;
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struct {
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u64 cmcr_vector : 8;
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u64 cmcr_reserved1 : 4;
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u64 cmcr_ignored1 : 1;
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u64 cmcr_reserved2 : 3;
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u64 cmcr_mask : 1;
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u64 cmcr_ignored2 : 47;
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} cmcv_reg_s;
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} cmcv_reg_t;
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#define cmcv_mask cmcv_reg_s.cmcr_mask
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#define cmcv_vector cmcv_reg_s.cmcr_vector
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enum {
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IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
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IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
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IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
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IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
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};
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/* Information maintained by the MC infrastructure */
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typedef struct ia64_mc_info_s {
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u64 imi_mca_handler;
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size_t imi_mca_handler_size;
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u64 imi_monarch_init_handler;
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size_t imi_monarch_init_handler_size;
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u64 imi_slave_init_handler;
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size_t imi_slave_init_handler_size;
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u8 imi_rendez_checkin[NR_CPUS];
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} ia64_mc_info_t;
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/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
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* Besides the handover state, it also contains some saved registers from the
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* time of the event.
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* Note: mca_asm.S depends on the precise layout of this structure.
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*/
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struct ia64_sal_os_state {
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/* SAL to OS */
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unsigned long os_gp; /* GP of the os registered with the SAL, physical */
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unsigned long pal_proc; /* PAL_PROC entry point, physical */
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unsigned long sal_proc; /* SAL_PROC entry point, physical */
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unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
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unsigned long proc_state_param; /* from R18 */
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unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
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/* common */
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unsigned long sal_ra; /* Return address in SAL, physical */
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unsigned long sal_gp; /* GP of the SAL - physical */
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pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
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/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
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* Note: if the MCA/INIT recovery code wants to resume to a new context
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* then it must change these values to reflect the new kernel stack.
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*/
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unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
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unsigned long prev_IA64_KR_CURRENT_STACK;
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struct task_struct *prev_task; /* previous task, NULL if it is not useful */
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/* Some interrupt registers are not saved in minstate, pt_regs or
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* switch_stack. Because MCA/INIT can occur when interrupts are
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* disabled, we need to save the additional interrupt registers over
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* MCA/INIT and resume.
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*/
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unsigned long isr;
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unsigned long ifa;
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unsigned long itir;
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unsigned long iipa;
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unsigned long iim;
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unsigned long iha;
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/* OS to SAL */
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unsigned long os_status; /* OS status to SAL, enum below */
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unsigned long context; /* 0 if return to same context
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1 if return to new context */
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/* I-resources */
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unsigned long iip;
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unsigned long ipsr;
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unsigned long ifs;
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};
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enum {
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IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
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IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
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IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
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IA64_MCA_HALT = -3 /* System to be halted by SAL */
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};
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enum {
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IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
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IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
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};
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enum {
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IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
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IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
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};
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/* Per-CPU MCA state that is too big for normal per-CPU variables. */
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struct ia64_mca_cpu {
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u64 mca_stack[KERNEL_STACK_SIZE/8];
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u64 init_stack[KERNEL_STACK_SIZE/8];
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};
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/* Array of physical addresses of each CPU's MCA area. */
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extern unsigned long __per_cpu_mca[NR_CPUS];
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extern int cpe_vector;
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extern int ia64_cpe_irq;
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extern void ia64_mca_init(void);
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extern void ia64_mca_cpu_init(void *);
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extern void ia64_os_mca_dispatch(void);
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extern void ia64_os_mca_dispatch_end(void);
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extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
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extern void ia64_init_handler(struct pt_regs *,
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struct switch_stack *,
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struct ia64_sal_os_state *);
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extern void ia64_os_init_on_kdump(void);
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extern void ia64_monarch_init_handler(void);
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extern void ia64_slave_init_handler(void);
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extern void ia64_mca_cmc_vector_setup(void);
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extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
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extern void ia64_unreg_MCA_extension(void);
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extern unsigned long ia64_get_rnat(unsigned long *);
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extern void ia64_set_psr_mc(void);
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extern void ia64_mca_printk(const char * fmt, ...)
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__attribute__ ((format (printf, 1, 2)));
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struct ia64_mca_notify_die {
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struct ia64_sal_os_state *sos;
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int *monarch_cpu;
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int *data;
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};
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DECLARE_PER_CPU(u64, ia64_mca_pal_base);
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#else /* __ASSEMBLY__ */
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#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
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#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
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#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
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#define IA64_MCA_HALT -3 /* System to be halted by SAL */
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#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
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#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
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#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
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#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_IA64_MCA_H */
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