![Linus Torvalds](/assets/img/avatar_default.png)
Pull ARM updates from Russell King: - add support for ELF fdpic binaries on both MMU and noMMU platforms - linker script cleanups - support for compressed .data section for XIP images - discard memblock arrays when possible - various cleanups - atomic DMA pool updates - better diagnostics of missing/corrupt device tree - export information to allow userspace kexec tool to place images more inteligently, so that the device tree isn't overwritten by the booting kernel - make early_printk more efficient on semihosted systems - noMMU cleanups - SA1111 PCMCIA update in preparation for further cleanups * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (38 commits) ARM: 8719/1: NOMMU: work around maybe-uninitialized warning ARM: 8717/2: debug printch/printascii: translate '\n' to "\r\n" not "\n\r" ARM: 8713/1: NOMMU: Support MPU in XIP configuration ARM: 8712/1: NOMMU: Use more MPU regions to cover memory ARM: 8711/1: V7M: Add support for MPU to M-class ARM: 8710/1: Kconfig: Kill CONFIG_VECTORS_BASE ARM: 8709/1: NOMMU: Disallow MPU for XIP ARM: 8708/1: NOMMU: Rework MPU to be mostly done in C ARM: 8707/1: NOMMU: Update MPU accessors to use cp15 helpers ARM: 8706/1: NOMMU: Move out MPU setup in separate module ARM: 8702/1: head-common.S: Clear lr before jumping to start_kernel() ARM: 8705/1: early_printk: use printascii() rather than printch() ARM: 8703/1: debug.S: move hexbuf to a writable section ARM: add additional table to compressed kernel ARM: decompressor: fix BSS size calculation pcmcia: sa1111: remove special sa1111 mmio accessors pcmcia: sa1111: use sa1111_get_irq() to obtain IRQ resources ARM: better diagnostics with missing/corrupt dtb ARM: 8699/1: dma-mapping: Remove init_dma_coherent_pool_size() ARM: 8698/1: dma-mapping: Mark atomic_pool as __ro_after_init ..
341 lines
8 KiB
ArmAsm
341 lines
8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/* ld script to make ARM Linux kernel
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* taken from the i386 version by Russell King
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* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*/
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/* No __ro_after_init data in the .rodata section - which will always be ro */
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#define RO_AFTER_INIT_DATA
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#include <linux/sizes.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/page.h>
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#define PROC_INFO \
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. = ALIGN(4); \
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VMLINUX_SYMBOL(__proc_info_begin) = .; \
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*(.proc.info.init) \
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VMLINUX_SYMBOL(__proc_info_end) = .;
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#define IDMAP_TEXT \
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ALIGN_FUNCTION(); \
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VMLINUX_SYMBOL(__idmap_text_start) = .; \
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*(.idmap.text) \
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VMLINUX_SYMBOL(__idmap_text_end) = .; \
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. = ALIGN(PAGE_SIZE); \
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VMLINUX_SYMBOL(__hyp_idmap_text_start) = .; \
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*(.hyp.idmap.text) \
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VMLINUX_SYMBOL(__hyp_idmap_text_end) = .;
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#ifdef CONFIG_HOTPLUG_CPU
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#define ARM_CPU_DISCARD(x)
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#define ARM_CPU_KEEP(x) x
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#else
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#define ARM_CPU_DISCARD(x) x
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#define ARM_CPU_KEEP(x)
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#endif
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#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
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defined(CONFIG_GENERIC_BUG)
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#define ARM_EXIT_KEEP(x) x
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#define ARM_EXIT_DISCARD(x)
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#else
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#define ARM_EXIT_KEEP(x)
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#define ARM_EXIT_DISCARD(x) x
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#endif
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OUTPUT_ARCH(arm)
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ENTRY(stext)
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#ifndef __ARMEB__
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jiffies = jiffies_64;
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#else
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS
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{
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/*
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* XXX: The linker does not define how output sections are
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* assigned to input sections when there are multiple statements
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* matching the same input section name. There is no documented
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* order of matching.
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*
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* unwind exit sections must be discarded before the rest of the
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* unwind sections get included.
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*/
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/DISCARD/ : {
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*(.ARM.exidx.exit.text)
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*(.ARM.extab.exit.text)
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ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text))
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ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text))
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ARM_EXIT_DISCARD(EXIT_TEXT)
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ARM_EXIT_DISCARD(EXIT_DATA)
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EXIT_CALL
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#ifndef CONFIG_MMU
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*(.text.fixup)
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*(__ex_table)
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#endif
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*(.alt.smp.init)
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*(.discard)
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*(.discard.*)
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}
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. = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
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_xiprom = .; /* XIP ROM area to be mapped */
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.head.text : {
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_text = .;
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HEAD_TEXT
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}
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.text : { /* Real text segment */
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_stext = .; /* Text and read-only data */
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IDMAP_TEXT
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__exception_text_start = .;
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*(.exception.text)
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__exception_text_end = .;
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IRQENTRY_TEXT
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TEXT_TEXT
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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*(.gnu.warning)
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*(.glue_7)
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*(.glue_7t)
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. = ALIGN(4);
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*(.got) /* Global offset table */
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ARM_CPU_KEEP(PROC_INFO)
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}
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RO_DATA(PAGE_SIZE)
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. = ALIGN(4);
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__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
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__start___ex_table = .;
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#ifdef CONFIG_MMU
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*(__ex_table)
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#endif
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__stop___ex_table = .;
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}
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#ifdef CONFIG_ARM_UNWIND
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/*
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* Stack unwinding tables
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*/
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. = ALIGN(8);
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.ARM.unwind_idx : {
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__start_unwind_idx = .;
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*(.ARM.exidx*)
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__stop_unwind_idx = .;
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}
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.ARM.unwind_tab : {
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__start_unwind_tab = .;
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*(.ARM.extab*)
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__stop_unwind_tab = .;
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}
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#endif
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NOTES
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_etext = .; /* End of text and rodata section */
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/*
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* The vectors and stubs are relocatable code, and the
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* only thing that matters is their relative offsets
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*/
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__vectors_start = .;
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.vectors 0xffff0000 : AT(__vectors_start) {
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*(.vectors)
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}
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. = __vectors_start + SIZEOF(.vectors);
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__vectors_end = .;
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__stubs_start = .;
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.stubs ADDR(.vectors) + 0x1000 : AT(__stubs_start) {
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*(.stubs)
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}
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. = __stubs_start + SIZEOF(.stubs);
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__stubs_end = .;
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PROVIDE(vector_fiq_offset = vector_fiq - ADDR(.vectors));
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INIT_TEXT_SECTION(8)
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.exit.text : {
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ARM_EXIT_KEEP(EXIT_TEXT)
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}
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.init.proc.info : {
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ARM_CPU_DISCARD(PROC_INFO)
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}
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.init.arch.info : {
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__arch_info_begin = .;
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*(.arch.info.init)
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__arch_info_end = .;
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}
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.init.tagtable : {
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__tagtable_begin = .;
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*(.taglist.init)
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__tagtable_end = .;
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}
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.init.rodata : {
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INIT_SETUP(16)
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INIT_CALLS
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CON_INITCALL
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SECURITY_INITCALL
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INIT_RAM_FS
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}
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#ifdef CONFIG_ARM_MPU
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. = ALIGN(SZ_128K);
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#endif
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_exiprom = .; /* End of XIP ROM area */
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/*
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* From this point, stuff is considered writable and will be copied to RAM
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*/
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__data_loc = ALIGN(4); /* location in file */
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. = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
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#undef LOAD_OFFSET
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#define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
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. = ALIGN(THREAD_SIZE);
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_sdata = .;
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RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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.data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
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*(.data..ro_after_init)
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}
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_edata = .;
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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}
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.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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#ifdef CONFIG_SMP
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PERCPU_SECTION(L1_CACHE_BYTES)
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#endif
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/*
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* End of copied data. We need a dummy section to get its LMA.
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* Also located before final ALIGN() as trailing padding is not stored
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* in the resulting binary file and useless to copy.
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*/
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.data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
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_edata_loc = LOADADDR(.data.endmark);
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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#ifdef CONFIG_HAVE_TCM
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/*
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* We align everything to a page boundary so we can
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* free it after init has commenced and TCM contents have
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* been copied to its destination.
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*/
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.tcm_start : {
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. = ALIGN(PAGE_SIZE);
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__tcm_start = .;
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__itcm_start = .;
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}
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/*
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* Link these to the ITCM RAM
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* Put VMA to the TCM address and LMA to the common RAM
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* and we'll upload the contents from RAM to TCM and free
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* the used RAM after that.
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*/
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.text_itcm ITCM_OFFSET : AT(__itcm_start)
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{
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__sitcm_text = .;
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*(.tcm.text)
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*(.tcm.rodata)
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. = ALIGN(4);
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__eitcm_text = .;
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}
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/*
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* Reset the dot pointer, this is needed to create the
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* relative __dtcm_start below (to be used as extern in code).
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*/
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. = ADDR(.tcm_start) + SIZEOF(.tcm_start) + SIZEOF(.text_itcm);
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.dtcm_start : {
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__dtcm_start = .;
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}
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/* TODO: add remainder of ITCM as well, that can be used for data! */
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.data_dtcm DTCM_OFFSET : AT(__dtcm_start)
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{
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. = ALIGN(4);
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__sdtcm_data = .;
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*(.tcm.data)
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. = ALIGN(4);
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__edtcm_data = .;
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}
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/* Reset the dot pointer or the linker gets confused */
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. = ADDR(.dtcm_start) + SIZEOF(.data_dtcm);
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/* End marker for freeing TCM copy in linked object */
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.tcm_end : AT(ADDR(.dtcm_start) + SIZEOF(.data_dtcm)){
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. = ALIGN(PAGE_SIZE);
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__tcm_end = .;
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}
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#endif
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BSS_SECTION(0, 0, 8)
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_end = .;
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STABS_DEBUG
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}
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/*
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* These must never be empty
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* If you have to comment these two assert statements out, your
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* binutils is too old (for other reasons as well)
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*/
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ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
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ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
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/*
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* The HYP init code can't be more than a page long,
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* and should not cross a page boundary.
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* The above comment applies as well.
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*/
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ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE,
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"HYP init code too big or misaligned")
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#ifdef CONFIG_XIP_DEFLATED_DATA
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/*
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* The .bss is used as a stack area for __inflate_kernel_data() whose stack
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* frame is 9568 bytes. Make sure it has extra room left.
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*/
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ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
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#endif
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#ifdef CONFIG_ARM_MPU
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/*
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* Due to PMSAv7 restriction on base address and size we have to
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* enforce minimal alignment restrictions. It was seen that weaker
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* alignment restriction on _xiprom will likely force XIP address
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* space spawns multiple MPU regions thus it is likely we run in
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* situation when we are reprogramming MPU region we run on with
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* something which doesn't cover reprogramming code itself, so as soon
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* as we update MPU settings we'd immediately try to execute straight
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* from background region which is XN.
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* It seem that alignment in 1M should suit most users.
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* _exiprom is aligned as 1/8 of 1M so can be covered by subregion
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* disable
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*/
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ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
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ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
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#endif
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