![Mike Frysinger](/assets/img/avatar_default.png)
Reported-by: Rob Maris <maris.rob@vdi.de> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
91 lines
2.3 KiB
C
91 lines
2.3 KiB
C
/*
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* File: sound/soc/codec/ad73311.h
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* Based on:
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* Author: Cliff Cai <cliff.cai@analog.com>
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*
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* Created: Thur Sep 25, 2008
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* Description: definitions for AD73311 registers
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*
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*
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* Modified:
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* Copyright 2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __AD73311_H__
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#define __AD73311_H__
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#define AD_CONTROL 0x8000
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#define AD_DATA 0x0000
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#define AD_READ 0x4000
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#define AD_WRITE 0x0000
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/* Control register A */
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#define CTRL_REG_A (0 << 8)
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#define REGA_MODE_PRO 0x00
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#define REGA_MODE_DATA 0x01
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#define REGA_MODE_MIXED 0x03
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#define REGA_DLB 0x04
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#define REGA_SLB 0x08
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#define REGA_DEVC(x) ((x & 0x7) << 4)
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#define REGA_RESET 0x80
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/* Control register B */
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#define CTRL_REG_B (1 << 8)
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#define REGB_DIRATE(x) (x & 0x3)
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#define REGB_SCDIV(x) ((x & 0x3) << 2)
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#define REGB_MCDIV(x) ((x & 0x7) << 4)
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#define REGB_CEE (1 << 7)
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/* Control register C */
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#define CTRL_REG_C (2 << 8)
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#define REGC_PUDEV (1 << 0)
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#define REGC_PUADC (1 << 3)
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#define REGC_PUDAC (1 << 4)
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#define REGC_PUREF (1 << 5)
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#define REGC_REFUSE (1 << 6)
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/* Control register D */
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#define CTRL_REG_D (3 << 8)
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#define REGD_IGS(x) (x & 0x7)
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#define REGD_RMOD (1 << 3)
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#define REGD_OGS(x) ((x & 0x7) << 4)
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#define REGD_MUTE (1 << 7)
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/* Control register E */
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#define CTRL_REG_E (4 << 8)
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#define REGE_DA(x) (x & 0x1f)
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#define REGE_IBYP (1 << 5)
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/* Control register F */
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#define CTRL_REG_F (5 << 8)
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#define REGF_SEEN (1 << 5)
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#define REGF_INV (1 << 6)
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#define REGF_ALB (1 << 7)
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extern struct snd_soc_dai ad73311_dai;
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extern struct snd_soc_codec_device soc_codec_dev_ad73311;
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#endif
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