![Linus Torvalds](/assets/img/avatar_default.png)
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
174 lines
4.6 KiB
C
174 lines
4.6 KiB
C
/*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Common Header for EXYNOS machines
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
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#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
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#include <linux/reboot.h>
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#include <linux/of.h>
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#define EXYNOS3250_SOC_ID 0xE3472000
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#define EXYNOS3_SOC_MASK 0xFFFFF000
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#define EXYNOS4210_CPU_ID 0x43210000
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#define EXYNOS4212_CPU_ID 0x43220000
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#define EXYNOS4412_CPU_ID 0xE4412200
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#define EXYNOS4_CPU_MASK 0xFFFE0000
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#define EXYNOS5250_SOC_ID 0x43520000
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#define EXYNOS5410_SOC_ID 0xE5410000
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#define EXYNOS5420_SOC_ID 0xE5420000
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#define EXYNOS5440_SOC_ID 0xE5440000
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#define EXYNOS5800_SOC_ID 0xE5422000
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#define EXYNOS5_SOC_MASK 0xFFFFF000
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extern unsigned long samsung_cpu_id;
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#define IS_SAMSUNG_CPU(name, id, mask) \
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static inline int is_samsung_##name(void) \
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{ \
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return ((samsung_cpu_id & mask) == (id & mask)); \
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}
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IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
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IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
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IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
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IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
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IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
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#if defined(CONFIG_SOC_EXYNOS3250)
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# define soc_is_exynos3250() is_samsung_exynos3250()
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#else
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# define soc_is_exynos3250() 0
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#endif
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#if defined(CONFIG_CPU_EXYNOS4210)
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# define soc_is_exynos4210() is_samsung_exynos4210()
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#else
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# define soc_is_exynos4210() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS4212)
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# define soc_is_exynos4212() is_samsung_exynos4212()
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#else
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# define soc_is_exynos4212() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS4412)
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# define soc_is_exynos4412() is_samsung_exynos4412()
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#else
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# define soc_is_exynos4412() 0
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#endif
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#define EXYNOS4210_REV_0 (0x0)
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#define EXYNOS4210_REV_1_0 (0x10)
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#define EXYNOS4210_REV_1_1 (0x11)
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#if defined(CONFIG_SOC_EXYNOS5250)
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# define soc_is_exynos5250() is_samsung_exynos5250()
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#else
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# define soc_is_exynos5250() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5410)
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# define soc_is_exynos5410() is_samsung_exynos5410()
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#else
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# define soc_is_exynos5410() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5420)
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# define soc_is_exynos5420() is_samsung_exynos5420()
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#else
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# define soc_is_exynos5420() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5440)
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# define soc_is_exynos5440() is_samsung_exynos5440()
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#else
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# define soc_is_exynos5440() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5800)
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# define soc_is_exynos5800() is_samsung_exynos5800()
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#else
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# define soc_is_exynos5800() 0
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#endif
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#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
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soc_is_exynos4412())
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#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
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soc_is_exynos5420() || soc_is_exynos5800())
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void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
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struct map_desc;
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extern void __iomem *sysram_ns_base_addr;
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extern void __iomem *sysram_base_addr;
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void exynos_init_io(void);
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void exynos_restart(enum reboot_mode mode, const char *cmd);
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void exynos_cpuidle_init(void);
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void exynos_cpufreq_init(void);
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void exynos_init_late(void);
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void exynos_firmware_init(void);
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#ifdef CONFIG_PINCTRL_EXYNOS
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extern u32 exynos_get_eint_wake_mask(void);
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#else
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static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; }
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#endif
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#ifdef CONFIG_PM_SLEEP
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extern void __init exynos_pm_init(void);
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#else
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static inline void exynos_pm_init(void) {}
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#endif
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extern void exynos_cpu_resume(void);
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extern struct smp_operations exynos_smp_ops;
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extern void exynos_cpu_die(unsigned int cpu);
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/* PMU(Power Management Unit) support */
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#define PMU_TABLE_END NULL
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enum sys_powerdown {
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SYS_AFTR,
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SYS_LPA,
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SYS_SLEEP,
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NUM_SYS_POWERDOWN,
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};
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struct exynos_pmu_conf {
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void __iomem *reg;
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unsigned int val[NUM_SYS_POWERDOWN];
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};
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extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
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extern void exynos_cpu_power_down(int cpu);
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extern void exynos_cpu_power_up(int cpu);
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extern int exynos_cpu_power_state(int cpu);
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extern void exynos_cluster_power_down(int cluster);
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extern void exynos_cluster_power_up(int cluster);
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extern int exynos_cluster_power_state(int cluster);
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extern void exynos_enter_aftr(void);
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extern void s5p_init_cpu(void __iomem *cpuid_addr);
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extern unsigned int samsung_rev(void);
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#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
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