fd553821a9
minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqpTQoQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgZ0uCACl6GsROypjpCGLtCsxlaAXdjk0EuBI3rzy wW2AkmeJQHvMPYIAodVUTqEJW7w2M4V0LbF1YOzebSyLMckejKy2jQGNcjQeQ//p QAIilflqxqYHTzx9Abv1EpX9uYVsLA46TUnInHAlo+SyDcDAx5/D37oASS+EvlKS AHniQE5XfH/zf/0ASRqyzKXI+rxhovinUCeVxsJmWS5+jUchUy/PTgx3OBnTahd+ JYjEOygTfPJoVXI3LBsQhuZdGZAVoCrDETsur8tMBBHwUHDQxy2rpLwzqv72C+SR kdO93Xgjz1+mML3qivJPKYPlc4OabFKgP9BzMnBsALJPXykX7cQw =Ay+8 -----END PGP SIGNATURE----- Merge tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner: The rk3399 gained support its Cadence displayport controller and some minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. * tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399 arm64: dts: rockchip: add a standalone version of the rk3399 sapphire arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM dt-bindings: add RK3368-uQ7 SoM and EVK base board arm64: dts: rockchip: Fix RK3328 UART DMAs arm64: dts: rockchip: enable DP for rk3399-gru arm64: dts: rockchip: add cdn-dp node for rk3399. arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399 arm64: dts: rockchip: enable tsadc on rk3399-puma arm64: dts: rockchip: add roc-rk3328-cc board arm64: dts: rockchip: Add cif test clocks for rk3399
656 lines
14 KiB
Plaintext
656 lines
14 KiB
Plaintext
/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "dt-bindings/pwm/pwm.h"
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#include "dt-bindings/input/input.h"
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#include "rk3399.dtsi"
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#include "rk3399-opp.dtsi"
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/ {
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compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
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backlight: backlight {
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compatible = "pwm-backlight";
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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pwms = <&pwm0 0 25000 0>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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keys: gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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power {
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debounce-interval = <100>;
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gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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label = "GPIO Power";
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linux,code = <KEY_POWER>;
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linux,input-type = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_btn>;
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wakeup-source;
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};
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};
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/* switched by pmic_sleep */
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vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_1v8>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_sys>;
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};
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vcc_sys: vcc-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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vin-supply = <&vcc_sys>;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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vin-supply = <&vcc_sys>;
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};
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&emmc_phy {
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status = "okay";
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};
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&gmac {
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assigned-clocks = <&cru SCLK_RMII_SRC>;
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assigned-clock-parents = <&clkin_gmac>;
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clock_in_out = "input";
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phy-supply = <&vcc_lan>;
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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tx_delay = <0x28>;
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rx_delay = <0x11>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c3>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <400000>;
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i2c-scl-rising-time-ns = <168>;
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i2c-scl-falling-time-ns = <4>;
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio1>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk808-clkout2";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc6-supply = <&vcc_sys>;
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vcc7-supply = <&vcc_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc_sys>;
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vcc10-supply = <&vcc_sys>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc1v8_pmu>;
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regulators {
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vdd_center: DCDC_REG1 {
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regulator-name = "vdd_center";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_l: DCDC_REG2 {
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regulator-name = "vdd_cpu_l";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG4 {
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc1v8_dvp: LDO_REG1 {
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regulator-name = "vcc1v8_dvp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v0_tp: LDO_REG2 {
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regulator-name = "vcc3v0_tp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v8_pmu: LDO_REG3 {
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regulator-name = "vcc1v8_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc_sdio: LDO_REG4 {
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regulator-name = "vcc_sdio";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcca3v0_codec: LDO_REG5 {
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regulator-name = "vcca3v0_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_1v5: LDO_REG6 {
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regulator-name = "vcc_1v5";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1500000>;
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};
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};
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vcca1v8_codec: LDO_REG7 {
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regulator-name = "vcca1v8_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_3v0: LDO_REG8 {
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regulator-name = "vcc_3v0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcc3v3_s3: vcc_lan: SWITCH_REG1 {
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regulator-name = "vcc3v3_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_s0: SWITCH_REG2 {
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regulator-name = "vcc3v3_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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vdd_cpu_b: regulator@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu_b";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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regulator-always-on;
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regulator-boot-on;
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|
vin-supply = <&vcc_sys>;
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_gpu: regulator@41 {
|
|
compatible = "silergy,syr828";
|
|
reg = <0x41>;
|
|
fcs,suspend-voltage-selector = <1>;
|
|
regulator-name = "vdd_gpu";
|
|
regulator-min-microvolt = <712500>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-ramp-delay = <1000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
vin-supply = <&vcc_sys>;
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
i2c-scl-rising-time-ns = <450>;
|
|
i2c-scl-falling-time-ns = <15>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2s2 {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&io_domains {
|
|
status = "okay";
|
|
|
|
bt656-supply = <&vcc_3v0>;
|
|
audio-supply = <&vcca1v8_codec>;
|
|
sdmmc-supply = <&vcc_sdio>;
|
|
gpio1830-supply = <&vcc_3v0>;
|
|
};
|
|
|
|
&pcie_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
|
|
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
|
|
assigned-clock-rates = <100000000>;
|
|
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
num-lanes = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
pmu1830-supply = <&vcc_3v0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
buttons {
|
|
pwr_btn: pwr-btn {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int_l: pmic-int-l {
|
|
rockchip,pins =
|
|
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
pmic_dvs2: pmic-dvs2 {
|
|
rockchip,pins =
|
|
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
vsel1_gpio: vsel1-gpio {
|
|
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
vsel2_gpio: vsel2-gpio {
|
|
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
usb2 {
|
|
vcc5v0_host_en: vcc5v0-host-en {
|
|
rockchip,pins =
|
|
<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&saradc {
|
|
vref-supply = <&vcca1v8_s3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
clock-frequency = <150000000>;
|
|
disable-wp;
|
|
max-frequency = <150000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
|
vqmmc-supply = <&vcc_sdio>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
/* tshut mode 0:CRU 1:GPIO */
|
|
rockchip,hw-tshut-mode = <1>;
|
|
/* tshut polarity 0:LOW 1:HIGH */
|
|
rockchip,hw-tshut-polarity = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
|
|
u2phy0_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy0_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
|
|
u2phy1_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy1_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_0 {
|
|
status = "okay";
|
|
dr_mode = "otg";
|
|
};
|
|
|
|
&usbdrd3_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_1 {
|
|
status = "okay";
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl_mmu {
|
|
status = "okay";
|
|
};
|