![Linus Torvalds](/assets/img/avatar_default.png)
Pull x86 mm updates from Ingo Molnar: "The changes in here are: - text_poke() fixes and an extensive set of executability lockdowns, to (hopefully) eliminate the last residual circumstances under which we are using W|X mappings even temporarily on x86 kernels. This required a broad range of surgery in text patching facilities, module loading, trampoline handling and other bits. - tweak page fault messages to be more informative and more structured. - remove DISCONTIGMEM support on x86-32 and make SPARSEMEM the default. - reduce KASLR granularity on 5-level paging kernels from 512 GB to 1 GB. - misc other changes and updates" * 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (36 commits) x86/mm: Initialize PGD cache during mm initialization x86/alternatives: Add comment about module removal races x86/kprobes: Use vmalloc special flag x86/ftrace: Use vmalloc special flag bpf: Use vmalloc special flag modules: Use vmalloc special flag mm/vmalloc: Add flag for freeing of special permsissions mm/hibernation: Make hibernation handle unmapped pages x86/mm/cpa: Add set_direct_map_*() functions x86/alternatives: Remove the return value of text_poke_*() x86/jump-label: Remove support for custom text poker x86/modules: Avoid breaking W^X while loading modules x86/kprobes: Set instruction page as executable x86/ftrace: Set trampoline pages as executable x86/kgdb: Avoid redundant comparison of patched code x86/alternatives: Use temporary mm for text poking x86/alternatives: Initialize temporary mm for patching fork: Provide a function for copying init_mm uprobes: Initialize uprobes earlier x86/mm: Save debug registers when loading a temporary mm ...
617 lines
18 KiB
C
617 lines
18 KiB
C
/* include/asm-generic/tlb.h
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*
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* Generic TLB shootdown code
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*
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* Copyright 2001 Red Hat, Inc.
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* Based on code from mm/memory.c Copyright Linus Torvalds and others.
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*
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* Copyright 2011 Red Hat, Inc., Peter Zijlstra
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_GENERIC__TLB_H
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#define _ASM_GENERIC__TLB_H
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#include <linux/mmu_notifier.h>
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#include <linux/swap.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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/*
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* Blindly accessing user memory from NMI context can be dangerous
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* if we're in the middle of switching the current user task or switching
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* the loaded mm.
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*/
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#ifndef nmi_uaccess_okay
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# define nmi_uaccess_okay() true
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#endif
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#ifdef CONFIG_MMU
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/*
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* Generic MMU-gather implementation.
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*
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* The mmu_gather data structure is used by the mm code to implement the
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* correct and efficient ordering of freeing pages and TLB invalidations.
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*
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* This correct ordering is:
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*
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* 1) unhook page
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* 2) TLB invalidate page
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* 3) free page
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*
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* That is, we must never free a page before we have ensured there are no live
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* translations left to it. Otherwise it might be possible to observe (or
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* worse, change) the page content after it has been reused.
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*
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* The mmu_gather API consists of:
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*
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* - tlb_gather_mmu() / tlb_finish_mmu(); start and finish a mmu_gather
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*
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* Finish in particular will issue a (final) TLB invalidate and free
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* all (remaining) queued pages.
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*
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* - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
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*
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* Defaults to flushing at tlb_end_vma() to reset the range; helps when
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* there's large holes between the VMAs.
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*
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* - tlb_remove_page() / __tlb_remove_page()
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* - tlb_remove_page_size() / __tlb_remove_page_size()
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*
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* __tlb_remove_page_size() is the basic primitive that queues a page for
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* freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a
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* boolean indicating if the queue is (now) full and a call to
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* tlb_flush_mmu() is required.
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*
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* tlb_remove_page() and tlb_remove_page_size() imply the call to
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* tlb_flush_mmu() when required and has no return value.
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*
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* - tlb_change_page_size()
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*
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* call before __tlb_remove_page*() to set the current page-size; implies a
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* possible tlb_flush_mmu() call.
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*
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* - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
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*
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* tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
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* related state, like the range)
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*
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* tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
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* whatever pages are still batched.
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*
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* - mmu_gather::fullmm
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*
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* A flag set by tlb_gather_mmu() to indicate we're going to free
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* the entire mm; this allows a number of optimizations.
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*
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* - We can ignore tlb_{start,end}_vma(); because we don't
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* care about ranges. Everything will be shot down.
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*
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* - (RISC) architectures that use ASIDs can cycle to a new ASID
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* and delay the invalidation until ASID space runs out.
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*
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* - mmu_gather::need_flush_all
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*
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* A flag that can be set by the arch code if it wants to force
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* flush the entire TLB irrespective of the range. For instance
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* x86-PAE needs this when changing top-level entries.
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*
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* And allows the architecture to provide and implement tlb_flush():
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*
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* tlb_flush() may, in addition to the above mentioned mmu_gather fields, make
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* use of:
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*
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* - mmu_gather::start / mmu_gather::end
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*
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* which provides the range that needs to be flushed to cover the pages to
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* be freed.
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*
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* - mmu_gather::freed_tables
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*
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* set when we freed page table pages
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*
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* - tlb_get_unmap_shift() / tlb_get_unmap_size()
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*
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* returns the smallest TLB entry size unmapped in this range.
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*
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* If an architecture does not provide tlb_flush() a default implementation
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* based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is
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* specified, in which case we'll default to flush_tlb_mm().
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*
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* Additionally there are a few opt-in features:
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*
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* HAVE_MMU_GATHER_PAGE_SIZE
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*
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* This ensures we call tlb_flush() every time tlb_change_page_size() actually
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* changes the size and provides mmu_gather::page_size to tlb_flush().
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*
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* HAVE_RCU_TABLE_FREE
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*
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* This provides tlb_remove_table(), to be used instead of tlb_remove_page()
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* for page directores (__p*_free_tlb()). This provides separate freeing of
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* the page-table pages themselves in a semi-RCU fashion (see comment below).
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* Useful if your architecture doesn't use IPIs for remote TLB invalidates
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* and therefore doesn't naturally serialize with software page-table walkers.
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*
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* When used, an architecture is expected to provide __tlb_remove_table()
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* which does the actual freeing of these pages.
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*
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* HAVE_RCU_TABLE_NO_INVALIDATE
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*
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* This makes HAVE_RCU_TABLE_FREE avoid calling tlb_flush_mmu_tlbonly() before
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* freeing the page-table pages. This can be avoided if you use
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* HAVE_RCU_TABLE_FREE and your architecture does _NOT_ use the Linux
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* page-tables natively.
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*
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* MMU_GATHER_NO_RANGE
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*
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* Use this if your architecture lacks an efficient flush_tlb_range().
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*/
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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/*
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* Semi RCU freeing of the page directories.
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*
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* This is needed by some architectures to implement software pagetable walkers.
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*
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* gup_fast() and other software pagetable walkers do a lockless page-table
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* walk and therefore needs some synchronization with the freeing of the page
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* directories. The chosen means to accomplish that is by disabling IRQs over
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* the walk.
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*
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* Architectures that use IPIs to flush TLBs will then automagically DTRT,
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* since we unlink the page, flush TLBs, free the page. Since the disabling of
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* IRQs delays the completion of the TLB flush we can never observe an already
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* freed page.
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*
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* Architectures that do not have this (PPC) need to delay the freeing by some
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* other means, this is that means.
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*
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* What we do is batch the freed directory pages (tables) and RCU free them.
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* We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
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* holds off grace periods.
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*
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* However, in order to batch these pages we need to allocate storage, this
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* allocation is deep inside the MM code and can thus easily fail on memory
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* pressure. To guarantee progress we fall back to single table freeing, see
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* the implementation of tlb_remove_table_one().
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*
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*/
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struct mmu_table_batch {
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struct rcu_head rcu;
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unsigned int nr;
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void *tables[0];
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};
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#define MAX_TABLE_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
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extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
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#endif
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#ifndef CONFIG_HAVE_MMU_GATHER_NO_GATHER
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/*
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* If we can't allocate a page to make a big batch of page pointers
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* to work on, then just handle a few from the on-stack structure.
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*/
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#define MMU_GATHER_BUNDLE 8
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struct mmu_gather_batch {
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struct mmu_gather_batch *next;
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unsigned int nr;
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unsigned int max;
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struct page *pages[0];
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};
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#define MAX_GATHER_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
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/*
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* Limit the maximum number of mmu_gather batches to reduce a risk of soft
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* lockups for non-preemptible kernels on huge machines when a lot of memory
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* is zapped during unmapping.
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* 10K pages freed at once should be safe even without a preemption point.
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*/
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#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
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extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
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int page_size);
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#endif
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/*
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* struct mmu_gather is an opaque type used by the mm code for passing around
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* any data needed by arch specific code for tlb_remove_page.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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struct mmu_table_batch *batch;
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#endif
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unsigned long start;
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unsigned long end;
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/*
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* we are in the middle of an operation to clear
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* a full mm and can make some optimizations
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*/
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unsigned int fullmm : 1;
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/*
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* we have performed an operation which
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* requires a complete flush of the tlb
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*/
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unsigned int need_flush_all : 1;
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/*
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* we have removed page directories
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*/
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unsigned int freed_tables : 1;
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/*
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* at which levels have we cleared entries?
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*/
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unsigned int cleared_ptes : 1;
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unsigned int cleared_pmds : 1;
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unsigned int cleared_puds : 1;
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unsigned int cleared_p4ds : 1;
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/*
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* tracks VM_EXEC | VM_HUGETLB in tlb_start_vma
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*/
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unsigned int vma_exec : 1;
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unsigned int vma_huge : 1;
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unsigned int batch_count;
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#ifndef CONFIG_HAVE_MMU_GATHER_NO_GATHER
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struct mmu_gather_batch *active;
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struct mmu_gather_batch local;
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struct page *__pages[MMU_GATHER_BUNDLE];
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#ifdef CONFIG_HAVE_MMU_GATHER_PAGE_SIZE
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unsigned int page_size;
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#endif
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#endif
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};
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void arch_tlb_gather_mmu(struct mmu_gather *tlb,
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struct mm_struct *mm, unsigned long start, unsigned long end);
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void tlb_flush_mmu(struct mmu_gather *tlb);
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void arch_tlb_finish_mmu(struct mmu_gather *tlb,
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unsigned long start, unsigned long end, bool force);
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static inline void __tlb_adjust_range(struct mmu_gather *tlb,
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unsigned long address,
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unsigned int range_size)
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{
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tlb->start = min(tlb->start, address);
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tlb->end = max(tlb->end, address + range_size);
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}
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static inline void __tlb_reset_range(struct mmu_gather *tlb)
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{
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if (tlb->fullmm) {
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tlb->start = tlb->end = ~0;
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} else {
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tlb->start = TASK_SIZE;
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tlb->end = 0;
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}
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tlb->freed_tables = 0;
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tlb->cleared_ptes = 0;
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tlb->cleared_pmds = 0;
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tlb->cleared_puds = 0;
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tlb->cleared_p4ds = 0;
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/*
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* Do not reset mmu_gather::vma_* fields here, we do not
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* call into tlb_start_vma() again to set them if there is an
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* intermediate flush.
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*/
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}
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#ifdef CONFIG_MMU_GATHER_NO_RANGE
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#if defined(tlb_flush) || defined(tlb_start_vma) || defined(tlb_end_vma)
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#error MMU_GATHER_NO_RANGE relies on default tlb_flush(), tlb_start_vma() and tlb_end_vma()
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#endif
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/*
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* When an architecture does not have efficient means of range flushing TLBs
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* there is no point in doing intermediate flushes on tlb_end_vma() to keep the
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* range small. We equally don't have to worry about page granularity or other
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* things.
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*
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* All we need to do is issue a full flush for any !0 range.
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*/
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static inline void tlb_flush(struct mmu_gather *tlb)
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{
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if (tlb->end)
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flush_tlb_mm(tlb->mm);
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}
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static inline void
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tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
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#define tlb_end_vma tlb_end_vma
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static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
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#else /* CONFIG_MMU_GATHER_NO_RANGE */
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#ifndef tlb_flush
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#if defined(tlb_start_vma) || defined(tlb_end_vma)
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#error Default tlb_flush() relies on default tlb_start_vma() and tlb_end_vma()
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#endif
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/*
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* When an architecture does not provide its own tlb_flush() implementation
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* but does have a reasonably efficient flush_vma_range() implementation
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* use that.
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*/
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static inline void tlb_flush(struct mmu_gather *tlb)
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{
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if (tlb->fullmm || tlb->need_flush_all) {
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flush_tlb_mm(tlb->mm);
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} else if (tlb->end) {
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struct vm_area_struct vma = {
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.vm_mm = tlb->mm,
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.vm_flags = (tlb->vma_exec ? VM_EXEC : 0) |
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(tlb->vma_huge ? VM_HUGETLB : 0),
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};
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flush_tlb_range(&vma, tlb->start, tlb->end);
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}
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}
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static inline void
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tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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/*
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* flush_tlb_range() implementations that look at VM_HUGETLB (tile,
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* mips-4k) flush only large pages.
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*
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* flush_tlb_range() implementations that flush I-TLB also flush D-TLB
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* (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing
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* range.
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*
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* We rely on tlb_end_vma() to issue a flush, such that when we reset
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* these values the batch is empty.
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*/
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tlb->vma_huge = !!(vma->vm_flags & VM_HUGETLB);
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tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
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}
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#else
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static inline void
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tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
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#endif
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#endif /* CONFIG_MMU_GATHER_NO_RANGE */
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static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
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{
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if (!tlb->end)
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return;
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tlb_flush(tlb);
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mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
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__tlb_reset_range(tlb);
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}
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static inline void tlb_remove_page_size(struct mmu_gather *tlb,
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struct page *page, int page_size)
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{
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if (__tlb_remove_page_size(tlb, page, page_size))
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tlb_flush_mmu(tlb);
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}
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static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
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}
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/* tlb_remove_page
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* Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
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* required.
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*/
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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return tlb_remove_page_size(tlb, page, PAGE_SIZE);
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}
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static inline void tlb_change_page_size(struct mmu_gather *tlb,
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unsigned int page_size)
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{
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#ifdef CONFIG_HAVE_MMU_GATHER_PAGE_SIZE
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if (tlb->page_size && tlb->page_size != page_size) {
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if (!tlb->fullmm)
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tlb_flush_mmu(tlb);
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}
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tlb->page_size = page_size;
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#endif
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}
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static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb)
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{
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if (tlb->cleared_ptes)
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return PAGE_SHIFT;
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if (tlb->cleared_pmds)
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return PMD_SHIFT;
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if (tlb->cleared_puds)
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return PUD_SHIFT;
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if (tlb->cleared_p4ds)
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return P4D_SHIFT;
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return PAGE_SHIFT;
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}
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static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb)
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{
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return 1UL << tlb_get_unmap_shift(tlb);
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}
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
|
|
* the vmas are adjusted to only cover the region to be torn down.
|
|
*/
|
|
#ifndef tlb_start_vma
|
|
static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
|
|
{
|
|
if (tlb->fullmm)
|
|
return;
|
|
|
|
tlb_update_vma_flags(tlb, vma);
|
|
flush_cache_range(vma, vma->vm_start, vma->vm_end);
|
|
}
|
|
#endif
|
|
|
|
#ifndef tlb_end_vma
|
|
static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
|
|
{
|
|
if (tlb->fullmm)
|
|
return;
|
|
|
|
/*
|
|
* Do a TLB flush and reset the range at VMA boundaries; this avoids
|
|
* the ranges growing with the unused space between consecutive VMAs,
|
|
* but also the mmu_gather::vma_* flags from tlb_start_vma() rely on
|
|
* this.
|
|
*/
|
|
tlb_flush_mmu_tlbonly(tlb);
|
|
}
|
|
#endif
|
|
|
|
#ifndef __tlb_remove_tlb_entry
|
|
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
|
|
#endif
|
|
|
|
/**
|
|
* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
|
|
*
|
|
* Record the fact that pte's were really unmapped by updating the range,
|
|
* so we can later optimise away the tlb invalidate. This helps when
|
|
* userspace is unmapping already-unmapped pages, which happens quite a lot.
|
|
*/
|
|
#define tlb_remove_tlb_entry(tlb, ptep, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
|
|
tlb->cleared_ptes = 1; \
|
|
__tlb_remove_tlb_entry(tlb, ptep, address); \
|
|
} while (0)
|
|
|
|
#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
|
|
do { \
|
|
unsigned long _sz = huge_page_size(h); \
|
|
__tlb_adjust_range(tlb, address, _sz); \
|
|
if (_sz == PMD_SIZE) \
|
|
tlb->cleared_pmds = 1; \
|
|
else if (_sz == PUD_SIZE) \
|
|
tlb->cleared_puds = 1; \
|
|
__tlb_remove_tlb_entry(tlb, ptep, address); \
|
|
} while (0)
|
|
|
|
/**
|
|
* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
|
|
* This is a nop so far, because only x86 needs it.
|
|
*/
|
|
#ifndef __tlb_remove_pmd_tlb_entry
|
|
#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
|
|
#endif
|
|
|
|
#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE); \
|
|
tlb->cleared_pmds = 1; \
|
|
__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
|
|
} while (0)
|
|
|
|
/**
|
|
* tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
|
|
* invalidation. This is a nop so far, because only x86 needs it.
|
|
*/
|
|
#ifndef __tlb_remove_pud_tlb_entry
|
|
#define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
|
|
#endif
|
|
|
|
#define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, HPAGE_PUD_SIZE); \
|
|
tlb->cleared_puds = 1; \
|
|
__tlb_remove_pud_tlb_entry(tlb, pudp, address); \
|
|
} while (0)
|
|
|
|
/*
|
|
* For things like page tables caches (ie caching addresses "inside" the
|
|
* page tables, like x86 does), for legacy reasons, flushing an
|
|
* individual page had better flush the page table caches behind it. This
|
|
* is definitely how x86 works, for example. And if you have an
|
|
* architected non-legacy page table cache (which I'm not aware of
|
|
* anybody actually doing), you're going to have some architecturally
|
|
* explicit flushing for that, likely *separate* from a regular TLB entry
|
|
* flush, and thus you'd need more than just some range expansion..
|
|
*
|
|
* So if we ever find an architecture
|
|
* that would want something that odd, I think it is up to that
|
|
* architecture to do its own odd thing, not cause pain for others
|
|
* http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
|
|
*
|
|
* For now w.r.t page table cache, mark the range_size as PAGE_SIZE
|
|
*/
|
|
|
|
#ifndef pte_free_tlb
|
|
#define pte_free_tlb(tlb, ptep, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
|
|
tlb->freed_tables = 1; \
|
|
tlb->cleared_pmds = 1; \
|
|
__pte_free_tlb(tlb, ptep, address); \
|
|
} while (0)
|
|
#endif
|
|
|
|
#ifndef pmd_free_tlb
|
|
#define pmd_free_tlb(tlb, pmdp, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
|
|
tlb->freed_tables = 1; \
|
|
tlb->cleared_puds = 1; \
|
|
__pmd_free_tlb(tlb, pmdp, address); \
|
|
} while (0)
|
|
#endif
|
|
|
|
#ifndef __ARCH_HAS_4LEVEL_HACK
|
|
#ifndef pud_free_tlb
|
|
#define pud_free_tlb(tlb, pudp, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
|
|
tlb->freed_tables = 1; \
|
|
tlb->cleared_p4ds = 1; \
|
|
__pud_free_tlb(tlb, pudp, address); \
|
|
} while (0)
|
|
#endif
|
|
#endif
|
|
|
|
#ifndef __ARCH_HAS_5LEVEL_HACK
|
|
#ifndef p4d_free_tlb
|
|
#define p4d_free_tlb(tlb, pudp, address) \
|
|
do { \
|
|
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
|
|
tlb->freed_tables = 1; \
|
|
__p4d_free_tlb(tlb, pudp, address); \
|
|
} while (0)
|
|
#endif
|
|
#endif
|
|
|
|
#endif /* CONFIG_MMU */
|
|
|
|
#endif /* _ASM_GENERIC__TLB_H */
|