![Linus Walleij](/assets/img/avatar_default.png)
To make sure that the MCDE is in a reasonable state during set-up, perform a reset by power cycling the block by dropping the on-chip regulator reference after probe. The display subsystem (DSS) has no dedicated reset line so dropping the EPOD regulator is the only real way of resetting it. We introduce code to enable and disable the regulator in the display enable/disable callbacks. We move the generic MCDE setup such as muxing of DPI signals and masking of interrupts to the display handling. When we drop the power to the whole display subsystem, not only MCDE but also the DSI links lose their state. Therefore we move the DSI block reset and hardware initialization code to the mcde_dsi_bridge_pre_enable() callback so this happens every time we start up the bridge, as we may have lost the power. We move the final disablement of the interrupts and clocks to the mcde_dsi_bridge_post_disable() callback rather than have it in the mcde_dsi_bridge_disable() callback, as some control messages may still be sent over the DSI host after the bridge has been shut down. This (together with a patch for the corresponding panel) makes the Samsung GT-S7710 successfully disable and re-enable its display, cutting all power while disabled and re-initializing the hardware when coming back up. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: newbytee@protonmail.com Cc: Stephan Gerhold <stephan@gerhold.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200808223122.1492124-3-linus.walleij@linaro.org
490 lines
13 KiB
C
490 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Linus Walleij <linus.walleij@linaro.org>
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* Parts of this file were based on the MCDE driver by Marcus Lorentzon
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* (C) ST-Ericsson SA 2013
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*/
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/**
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* DOC: ST-Ericsson MCDE Driver
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*
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* The MCDE (short for multi-channel display engine) is a graphics
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* controller found in the Ux500 chipsets, such as NovaThor U8500.
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* It was initially conceptualized by ST Microelectronics for the
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* successor of the Nomadik line, STn8500 but productified in the
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* ST-Ericsson U8500 where is was used for mass-market deployments
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* in Android phones from Samsung and Sony Ericsson.
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*
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* It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
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* panels with or without frame buffering and can convert most
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* input formats including most variants of RGB and YUV.
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*
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* The hardware has four display pipes, and the layout is a little
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* bit like this::
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*
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* Memory -> Overlay -> Channel -> FIFO -> 5 formatters -> DSI/DPI
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* External 0..5 0..3 A,B, 3 x DSI bridge
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* source 0..9 C0,C1 2 x DPI
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*
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* FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
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* panels with embedded buffer.
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* 3 of the formatters are for DSI.
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* 2 of the formatters are for DPI.
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*
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* Behind the formatters are the DSI or DPI ports that route to
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* the external pins of the chip. As there are 3 DSI ports and one
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* DPI port, it is possible to configure up to 4 display pipelines
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* (effectively using channels 0..3) for concurrent use.
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*
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* In the current DRM/KMS setup, we use one external source, one overlay,
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* one FIFO and one formatter which we connect to the simple CMA framebuffer
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* helpers. We then provide a bridge to the DSI port, and on the DSI port
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* bridge we connect hang a panel bridge or other bridge. This may be subject
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* to change as we exploit more of the hardware capabilities.
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*
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* TODO:
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*
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* - Enabled damaged rectangles using drm_plane_enable_fb_damage_clips()
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* so we can selectively just transmit the damaged area to a
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* command-only display.
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* - Enable mixing of more planes, possibly at the cost of moving away
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* from using the simple framebuffer pipeline.
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* - Enable output to bridges such as the AV8100 HDMI encoder from
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* the DSI bridge.
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/dma-buf.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_gem.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_of.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_vblank.h>
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#include "mcde_drm.h"
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#define DRIVER_DESC "DRM module for MCDE"
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#define MCDE_PID 0x000001FC
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#define MCDE_PID_METALFIX_VERSION_SHIFT 0
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#define MCDE_PID_METALFIX_VERSION_MASK 0x000000FF
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#define MCDE_PID_DEVELOPMENT_VERSION_SHIFT 8
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#define MCDE_PID_DEVELOPMENT_VERSION_MASK 0x0000FF00
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#define MCDE_PID_MINOR_VERSION_SHIFT 16
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#define MCDE_PID_MINOR_VERSION_MASK 0x00FF0000
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#define MCDE_PID_MAJOR_VERSION_SHIFT 24
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#define MCDE_PID_MAJOR_VERSION_MASK 0xFF000000
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static const struct drm_mode_config_funcs mcde_mode_config_funcs = {
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.fb_create = drm_gem_fb_create_with_dirty,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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static const struct drm_mode_config_helper_funcs mcde_mode_config_helpers = {
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/*
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* Using this function is necessary to commit atomic updates
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* that need the CRTC to be enabled before a commit, as is
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* the case with e.g. DSI displays.
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*/
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.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
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};
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static irqreturn_t mcde_irq(int irq, void *data)
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{
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struct mcde *mcde = data;
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u32 val;
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val = readl(mcde->regs + MCDE_MISERR);
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mcde_display_irq(mcde);
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if (val)
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dev_info(mcde->dev, "some error IRQ\n");
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writel(val, mcde->regs + MCDE_RISERR);
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return IRQ_HANDLED;
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}
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static int mcde_modeset_init(struct drm_device *drm)
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{
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struct drm_mode_config *mode_config;
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struct mcde *mcde = to_mcde(drm);
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int ret;
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if (!mcde->bridge) {
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dev_err(drm->dev, "no display output bridge yet\n");
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return -EPROBE_DEFER;
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}
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mode_config = &drm->mode_config;
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mode_config->funcs = &mcde_mode_config_funcs;
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mode_config->helper_private = &mcde_mode_config_helpers;
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/* This hardware can do 1080p */
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mode_config->min_width = 1;
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mode_config->max_width = 1920;
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mode_config->min_height = 1;
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mode_config->max_height = 1080;
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ret = drm_vblank_init(drm, 1);
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if (ret) {
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dev_err(drm->dev, "failed to init vblank\n");
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return ret;
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}
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ret = mcde_display_init(drm);
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if (ret) {
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dev_err(drm->dev, "failed to init display\n");
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return ret;
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}
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/*
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* Attach the DSI bridge
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*
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* TODO: when adding support for the DPI bridge or several DSI bridges,
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* we selectively connect the bridge(s) here instead of this simple
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* attachment.
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*/
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ret = drm_simple_display_pipe_attach_bridge(&mcde->pipe,
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mcde->bridge);
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if (ret) {
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dev_err(drm->dev, "failed to attach display output bridge\n");
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return ret;
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}
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drm_mode_config_reset(drm);
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drm_kms_helper_poll_init(drm);
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return 0;
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}
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DEFINE_DRM_GEM_CMA_FOPS(drm_fops);
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static struct drm_driver mcde_drm_driver = {
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.driver_features =
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DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
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.lastclose = drm_fb_helper_lastclose,
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.ioctls = NULL,
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.fops = &drm_fops,
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.name = "mcde",
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.desc = DRIVER_DESC,
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.date = "20180529",
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.major = 1,
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.minor = 0,
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.patchlevel = 0,
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DRM_GEM_CMA_DRIVER_OPS,
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};
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static int mcde_drm_bind(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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int ret;
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ret = drmm_mode_config_init(drm);
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if (ret)
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return ret;
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ret = component_bind_all(drm->dev, drm);
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if (ret) {
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dev_err(dev, "can't bind component devices\n");
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return ret;
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}
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ret = mcde_modeset_init(drm);
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if (ret)
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goto unbind;
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ret = drm_dev_register(drm, 0);
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if (ret < 0)
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goto unbind;
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drm_fbdev_generic_setup(drm, 32);
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return 0;
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unbind:
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component_unbind_all(drm->dev, drm);
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return ret;
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}
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static void mcde_drm_unbind(struct device *dev)
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{
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struct drm_device *drm = dev_get_drvdata(dev);
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drm_dev_unregister(drm);
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drm_atomic_helper_shutdown(drm);
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component_unbind_all(drm->dev, drm);
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}
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static const struct component_master_ops mcde_drm_comp_ops = {
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.bind = mcde_drm_bind,
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.unbind = mcde_drm_unbind,
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};
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static struct platform_driver *const mcde_component_drivers[] = {
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&mcde_dsi_driver,
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};
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static int mcde_compare_dev(struct device *dev, void *data)
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{
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return dev == data;
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}
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static int mcde_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct drm_device *drm;
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struct mcde *mcde;
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struct component_match *match = NULL;
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struct resource *res;
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u32 pid;
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int irq;
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int ret;
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int i;
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mcde = devm_drm_dev_alloc(dev, &mcde_drm_driver, struct mcde, drm);
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if (IS_ERR(mcde))
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return PTR_ERR(mcde);
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drm = &mcde->drm;
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mcde->dev = dev;
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platform_set_drvdata(pdev, drm);
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/* First obtain and turn on the main power */
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mcde->epod = devm_regulator_get(dev, "epod");
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if (IS_ERR(mcde->epod)) {
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ret = PTR_ERR(mcde->epod);
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dev_err(dev, "can't get EPOD regulator\n");
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return ret;
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}
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ret = regulator_enable(mcde->epod);
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if (ret) {
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dev_err(dev, "can't enable EPOD regulator\n");
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return ret;
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}
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mcde->vana = devm_regulator_get(dev, "vana");
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if (IS_ERR(mcde->vana)) {
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ret = PTR_ERR(mcde->vana);
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dev_err(dev, "can't get VANA regulator\n");
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goto regulator_epod_off;
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}
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ret = regulator_enable(mcde->vana);
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if (ret) {
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dev_err(dev, "can't enable VANA regulator\n");
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goto regulator_epod_off;
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}
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/*
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* The vendor code uses ESRAM (onchip RAM) and need to activate
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* the v-esram34 regulator, but we don't use that yet
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*/
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/* Clock the silicon so we can access the registers */
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mcde->mcde_clk = devm_clk_get(dev, "mcde");
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if (IS_ERR(mcde->mcde_clk)) {
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dev_err(dev, "unable to get MCDE main clock\n");
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ret = PTR_ERR(mcde->mcde_clk);
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goto regulator_off;
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}
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ret = clk_prepare_enable(mcde->mcde_clk);
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if (ret) {
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dev_err(dev, "failed to enable MCDE main clock\n");
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goto regulator_off;
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}
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dev_info(dev, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde->mcde_clk));
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mcde->lcd_clk = devm_clk_get(dev, "lcd");
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if (IS_ERR(mcde->lcd_clk)) {
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dev_err(dev, "unable to get LCD clock\n");
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ret = PTR_ERR(mcde->lcd_clk);
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goto clk_disable;
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}
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mcde->hdmi_clk = devm_clk_get(dev, "hdmi");
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if (IS_ERR(mcde->hdmi_clk)) {
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dev_err(dev, "unable to get HDMI clock\n");
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ret = PTR_ERR(mcde->hdmi_clk);
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goto clk_disable;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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mcde->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(mcde->regs)) {
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dev_err(dev, "no MCDE regs\n");
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ret = -EINVAL;
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goto clk_disable;
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}
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irq = platform_get_irq(pdev, 0);
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if (!irq) {
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ret = -EINVAL;
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goto clk_disable;
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}
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ret = devm_request_irq(dev, irq, mcde_irq, 0, "mcde", mcde);
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if (ret) {
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dev_err(dev, "failed to request irq %d\n", ret);
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goto clk_disable;
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}
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/*
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* Check hardware revision, we only support U8500v2 version
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* as this was the only version used for mass market deployment,
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* but surely you can add more versions if you have them and
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* need them.
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*/
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pid = readl(mcde->regs + MCDE_PID);
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dev_info(dev, "found MCDE HW revision %d.%d (dev %d, metal fix %d)\n",
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(pid & MCDE_PID_MAJOR_VERSION_MASK)
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>> MCDE_PID_MAJOR_VERSION_SHIFT,
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(pid & MCDE_PID_MINOR_VERSION_MASK)
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>> MCDE_PID_MINOR_VERSION_SHIFT,
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(pid & MCDE_PID_DEVELOPMENT_VERSION_MASK)
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>> MCDE_PID_DEVELOPMENT_VERSION_SHIFT,
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(pid & MCDE_PID_METALFIX_VERSION_MASK)
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>> MCDE_PID_METALFIX_VERSION_SHIFT);
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if (pid != 0x03000800) {
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dev_err(dev, "unsupported hardware revision\n");
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ret = -ENODEV;
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goto clk_disable;
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}
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/* Disable and clear any pending interrupts */
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mcde_display_disable_irqs(mcde);
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writel(0, mcde->regs + MCDE_IMSCERR);
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writel(0xFFFFFFFF, mcde->regs + MCDE_RISERR);
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/* Spawn child devices for the DSI ports */
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devm_of_platform_populate(dev);
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/* Create something that will match the subdrivers when we bind */
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for (i = 0; i < ARRAY_SIZE(mcde_component_drivers); i++) {
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struct device_driver *drv = &mcde_component_drivers[i]->driver;
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struct device *p = NULL, *d;
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while ((d = platform_find_device_by_driver(p, drv))) {
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put_device(p);
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component_match_add(dev, &match, mcde_compare_dev, d);
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p = d;
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}
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put_device(p);
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}
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if (!match) {
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dev_err(dev, "no matching components\n");
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ret = -ENODEV;
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goto clk_disable;
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}
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if (IS_ERR(match)) {
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dev_err(dev, "could not create component match\n");
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ret = PTR_ERR(match);
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goto clk_disable;
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}
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/*
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* Perform an invasive reset of the MCDE and all blocks by
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* cutting the power to the subsystem, then bring it back up
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* later when we enable the display as a result of
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* component_master_add_with_match().
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*/
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ret = regulator_disable(mcde->epod);
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if (ret) {
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dev_err(dev, "can't disable EPOD regulator\n");
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return ret;
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}
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/* Wait 50 ms so we are sure we cut the power */
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usleep_range(50000, 70000);
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ret = component_master_add_with_match(&pdev->dev, &mcde_drm_comp_ops,
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match);
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if (ret) {
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dev_err(dev, "failed to add component master\n");
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goto clk_disable;
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}
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return 0;
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clk_disable:
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clk_disable_unprepare(mcde->mcde_clk);
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regulator_off:
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regulator_disable(mcde->vana);
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regulator_epod_off:
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regulator_disable(mcde->epod);
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return ret;
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}
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static int mcde_remove(struct platform_device *pdev)
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{
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struct drm_device *drm = platform_get_drvdata(pdev);
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struct mcde *mcde = to_mcde(drm);
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component_master_del(&pdev->dev, &mcde_drm_comp_ops);
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clk_disable_unprepare(mcde->mcde_clk);
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regulator_disable(mcde->vana);
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regulator_disable(mcde->epod);
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return 0;
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}
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static const struct of_device_id mcde_of_match[] = {
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{
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.compatible = "ste,mcde",
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},
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{},
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};
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static struct platform_driver mcde_driver = {
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.driver = {
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.name = "mcde",
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.of_match_table = of_match_ptr(mcde_of_match),
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},
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.probe = mcde_probe,
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.remove = mcde_remove,
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};
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static struct platform_driver *const component_drivers[] = {
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&mcde_dsi_driver,
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};
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static int __init mcde_drm_register(void)
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{
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int ret;
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ret = platform_register_drivers(component_drivers,
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ARRAY_SIZE(component_drivers));
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if (ret)
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return ret;
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return platform_driver_register(&mcde_driver);
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}
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static void __exit mcde_drm_unregister(void)
|
|
{
|
|
platform_unregister_drivers(component_drivers,
|
|
ARRAY_SIZE(component_drivers));
|
|
platform_driver_unregister(&mcde_driver);
|
|
}
|
|
|
|
module_init(mcde_drm_register);
|
|
module_exit(mcde_drm_unregister);
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|
|
|
MODULE_ALIAS("platform:mcde-drm");
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
|
|
MODULE_LICENSE("GPL");
|