32 lines
1.0 KiB
Plaintext
32 lines
1.0 KiB
Plaintext
* NXP S32V234 Clock Generation Modules (MC_CGMs)
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The SoC supports four Clock Generation Modules, which provide registers for
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system and peripherals clock source selection and division. See chapters 22
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("Clocking"), 23 ("Clock Generation Module (MC_CGM)") and 69 ("Mode Entry
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Module (MC_ME)") in the reference manual[1].
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This binding uses the common clock binding:
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible:
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Should be:
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- "fsl,s32v234-mc_cgm0" for MC_CGM_0
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- "fsl,s32v234-mc_cgm1" for MC_CGM_1
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- "fsl,s32v234-mc_cgm2" for MC_CGM_2
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- "fsl,s32v234-mc_cgm3" for MC_CGM_3
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- reg:
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Location and length of the register set
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- #clock-cells (only for MC_CGM_0):
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Should be <1>. See dt-bindings/clock/s32v234-clock.h for the clock
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specifiers allowed in the clocks property of consumers.
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Example:
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clks: mc_cgm0@4003c000 {
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compatible = "fsl,s32v234-mc_cgm0";
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reg = <0x0 0x4003C000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
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