![Ursula Braun](/assets/img/avatar_default.png)
smc allocates a certain number of CQ entries for used RoCE devices. For mlx5 devices the chosen constant number results in a large allocation causing this warning: [13355.124656] WARNING: CPU: 3 PID: 16535 at mm/page_alloc.c:3883 __alloc_pages_nodemask+0x2be/0x10c0 [13355.124657] Modules linked in: smc_diag(O) smc(O) xt_CHECKSUM iptable_mangle ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_nat_ipv4 nf_nat nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_conntrack ipt_REJECT nf_reject_ipv4 xt_tcpudp bridge stp llc ip6table_filter ip6_tables iptable_filter mlx5_ib ib_core sunrpc mlx5_core s390_trng rng_core ghash_s390 prng aes_s390 des_s390 des_generic sha512_s390 sha256_s390 sha1_s390 sha_common ptp pps_core eadm_sch dm_multipath dm_mod vhost_net tun vhost tap sch_fq_codel kvm ip_tables x_tables autofs4 [last unloaded: smc] [13355.124672] CPU: 3 PID: 16535 Comm: kworker/3:0 Tainted: G O 4.14.0uschi #1 [13355.124673] Hardware name: IBM 3906 M04 704 (LPAR) [13355.124675] Workqueue: events smc_listen_work [smc] [13355.124677] task: 00000000e2f22100 task.stack: 0000000084720000 [13355.124678] Krnl PSW : 0704c00180000000 000000000029da76 (__alloc_pages_nodemask+0x2be/0x10c0) [13355.124681] R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:3 CC:0 PM:0 RI:0 EA:3 [13355.124682] Krnl GPRS: 0000000000000000 00550e00014080c0 0000000000000000 0000000000000001 [13355.124684] 000000000029d8b6 00000000f3bfd710 0000000000000000 00000000014080c0 [13355.124685] 0000000000000009 00000000ec277a00 0000000000200000 0000000000000000 [13355.124686] 0000000000000000 00000000000001ff 000000000029d8b6 0000000084723720 [13355.124708] Krnl Code: 000000000029da6a: a7110200 tmll %r1,512 000000000029da6e: a774ff29 brc 7,29d8c0 #000000000029da72: a7f40001 brc 15,29da74 >000000000029da76: a7f4ff25 brc 15,29d8c0 000000000029da7a: a7380000 lhi %r3,0 000000000029da7e: a7f4fef1 brc 15,29d860 000000000029da82: 5820f0c4 l %r2,196(%r15) 000000000029da86: a53e0048 llilh %r3,72 [13355.124720] Call Trace: [13355.124722] ([<000000000029d8b6>] __alloc_pages_nodemask+0xfe/0x10c0) [13355.124724] [<000000000013bd1e>] s390_dma_alloc+0x6e/0x148 [13355.124733] [<000003ff802eeba6>] mlx5_dma_zalloc_coherent_node+0x8e/0xe0 [mlx5_core] [13355.124740] [<000003ff802eee18>] mlx5_buf_alloc_node+0x70/0x108 [mlx5_core] [13355.124744] [<000003ff804eb410>] mlx5_ib_create_cq+0x558/0x898 [mlx5_ib] [13355.124749] [<000003ff80407d40>] ib_create_cq+0x48/0x88 [ib_core] [13355.124751] [<000003ff80109fba>] smc_ib_setup_per_ibdev+0x52/0x118 [smc] [13355.124753] [<000003ff8010bcb6>] smc_conn_create+0x65e/0x728 [smc] [13355.124755] [<000003ff801081a2>] smc_listen_work+0x2d2/0x540 [smc] [13355.124756] [<0000000000162c66>] process_one_work+0x1be/0x440 [13355.124758] [<0000000000162f40>] worker_thread+0x58/0x458 [13355.124759] [<0000000000169e7e>] kthread+0x14e/0x168 [13355.124760] [<00000000009ce8be>] kernel_thread_starter+0x6/0xc [13355.124762] [<00000000009ce8b8>] kernel_thread_starter+0x0/0xc [13355.124762] Last Breaking-Event-Address: [13355.124764] [<000000000029da72>] __alloc_pages_nodemask+0x2ba/0x10c0 [13355.124764] ---[ end trace 34be38b581c0b585 ]--- This patch reduces the smc constant for the maximum number of allocated completion queue entries SMC_MAX_CQE by 2 to avoid high round up values in the mlx5 code, and reduces the number of allocated completion queue entries even more, if the final allocation for an mlx5 device hits the MAX_ORDER limit. Reported-by: Ihnken Menssen <menssen@de.ibm.com> Signed-off-by: Ursula Braun <ubraun@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
544 lines
15 KiB
C
544 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Shared Memory Communications over RDMA (SMC-R) and RoCE
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*
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* IB infrastructure:
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* Establish SMC-R as an Infiniband Client to be notified about added and
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* removed IB devices of type RDMA.
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* Determine device and port characteristics for these IB devices.
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*
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* Copyright IBM Corp. 2016
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*
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* Author(s): Ursula Braun <ubraun@linux.vnet.ibm.com>
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*/
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#include <linux/random.h>
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#include <linux/workqueue.h>
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#include <linux/scatterlist.h>
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#include <rdma/ib_verbs.h>
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#include "smc_pnet.h"
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#include "smc_ib.h"
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#include "smc_core.h"
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#include "smc_wr.h"
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#include "smc.h"
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#define SMC_MAX_CQE 32766 /* max. # of completion queue elements */
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#define SMC_QP_MIN_RNR_TIMER 5
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#define SMC_QP_TIMEOUT 15 /* 4096 * 2 ** timeout usec */
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#define SMC_QP_RETRY_CNT 7 /* 7: infinite */
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#define SMC_QP_RNR_RETRY 7 /* 7: infinite */
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struct smc_ib_devices smc_ib_devices = { /* smc-registered ib devices */
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.lock = __SPIN_LOCK_UNLOCKED(smc_ib_devices.lock),
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.list = LIST_HEAD_INIT(smc_ib_devices.list),
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};
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#define SMC_LOCAL_SYSTEMID_RESET "%%%%%%%"
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u8 local_systemid[SMC_SYSTEMID_LEN] = SMC_LOCAL_SYSTEMID_RESET; /* unique system
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* identifier
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*/
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static int smc_ib_modify_qp_init(struct smc_link *lnk)
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{
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struct ib_qp_attr qp_attr;
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memset(&qp_attr, 0, sizeof(qp_attr));
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qp_attr.qp_state = IB_QPS_INIT;
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qp_attr.pkey_index = 0;
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qp_attr.port_num = lnk->ibport;
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qp_attr.qp_access_flags = IB_ACCESS_LOCAL_WRITE
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| IB_ACCESS_REMOTE_WRITE;
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return ib_modify_qp(lnk->roce_qp, &qp_attr,
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IB_QP_STATE | IB_QP_PKEY_INDEX |
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IB_QP_ACCESS_FLAGS | IB_QP_PORT);
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}
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static int smc_ib_modify_qp_rtr(struct smc_link *lnk)
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{
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enum ib_qp_attr_mask qp_attr_mask =
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IB_QP_STATE | IB_QP_AV | IB_QP_PATH_MTU | IB_QP_DEST_QPN |
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IB_QP_RQ_PSN | IB_QP_MAX_DEST_RD_ATOMIC | IB_QP_MIN_RNR_TIMER;
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struct ib_qp_attr qp_attr;
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memset(&qp_attr, 0, sizeof(qp_attr));
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qp_attr.qp_state = IB_QPS_RTR;
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qp_attr.path_mtu = min(lnk->path_mtu, lnk->peer_mtu);
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qp_attr.ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
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rdma_ah_set_port_num(&qp_attr.ah_attr, lnk->ibport);
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rdma_ah_set_grh(&qp_attr.ah_attr, NULL, 0, 0, 1, 0);
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rdma_ah_set_dgid_raw(&qp_attr.ah_attr, lnk->peer_gid);
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memcpy(&qp_attr.ah_attr.roce.dmac, lnk->peer_mac,
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sizeof(lnk->peer_mac));
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qp_attr.dest_qp_num = lnk->peer_qpn;
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qp_attr.rq_psn = lnk->peer_psn; /* starting receive packet seq # */
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qp_attr.max_dest_rd_atomic = 1; /* max # of resources for incoming
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* requests
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*/
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qp_attr.min_rnr_timer = SMC_QP_MIN_RNR_TIMER;
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return ib_modify_qp(lnk->roce_qp, &qp_attr, qp_attr_mask);
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}
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int smc_ib_modify_qp_rts(struct smc_link *lnk)
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{
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struct ib_qp_attr qp_attr;
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memset(&qp_attr, 0, sizeof(qp_attr));
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qp_attr.qp_state = IB_QPS_RTS;
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qp_attr.timeout = SMC_QP_TIMEOUT; /* local ack timeout */
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qp_attr.retry_cnt = SMC_QP_RETRY_CNT; /* retry count */
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qp_attr.rnr_retry = SMC_QP_RNR_RETRY; /* RNR retries, 7=infinite */
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qp_attr.sq_psn = lnk->psn_initial; /* starting send packet seq # */
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qp_attr.max_rd_atomic = 1; /* # of outstanding RDMA reads and
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* atomic ops allowed
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*/
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return ib_modify_qp(lnk->roce_qp, &qp_attr,
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IB_QP_STATE | IB_QP_TIMEOUT | IB_QP_RETRY_CNT |
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IB_QP_SQ_PSN | IB_QP_RNR_RETRY |
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IB_QP_MAX_QP_RD_ATOMIC);
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}
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int smc_ib_modify_qp_reset(struct smc_link *lnk)
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{
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struct ib_qp_attr qp_attr;
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memset(&qp_attr, 0, sizeof(qp_attr));
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qp_attr.qp_state = IB_QPS_RESET;
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return ib_modify_qp(lnk->roce_qp, &qp_attr, IB_QP_STATE);
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}
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int smc_ib_ready_link(struct smc_link *lnk)
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{
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struct smc_link_group *lgr =
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container_of(lnk, struct smc_link_group, lnk[0]);
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int rc = 0;
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rc = smc_ib_modify_qp_init(lnk);
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if (rc)
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goto out;
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rc = smc_ib_modify_qp_rtr(lnk);
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if (rc)
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goto out;
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smc_wr_remember_qp_attr(lnk);
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rc = ib_req_notify_cq(lnk->smcibdev->roce_cq_recv,
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IB_CQ_SOLICITED_MASK);
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if (rc)
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goto out;
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rc = smc_wr_rx_post_init(lnk);
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if (rc)
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goto out;
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smc_wr_remember_qp_attr(lnk);
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if (lgr->role == SMC_SERV) {
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rc = smc_ib_modify_qp_rts(lnk);
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if (rc)
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goto out;
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smc_wr_remember_qp_attr(lnk);
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}
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out:
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return rc;
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}
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static void smc_ib_port_terminate(struct smc_ib_device *smcibdev, u8 ibport)
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{
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struct smc_link_group *lgr, *l;
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list_for_each_entry_safe(lgr, l, &smc_lgr_list.list, list) {
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if (lgr->lnk[SMC_SINGLE_LINK].smcibdev == smcibdev &&
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lgr->lnk[SMC_SINGLE_LINK].ibport == ibport)
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smc_lgr_terminate(lgr);
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}
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}
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/* process context wrapper for might_sleep smc_ib_remember_port_attr */
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static void smc_ib_port_event_work(struct work_struct *work)
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{
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struct smc_ib_device *smcibdev = container_of(
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work, struct smc_ib_device, port_event_work);
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u8 port_idx;
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for_each_set_bit(port_idx, &smcibdev->port_event_mask, SMC_MAX_PORTS) {
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smc_ib_remember_port_attr(smcibdev, port_idx + 1);
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clear_bit(port_idx, &smcibdev->port_event_mask);
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if (!smc_ib_port_active(smcibdev, port_idx + 1))
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smc_ib_port_terminate(smcibdev, port_idx + 1);
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}
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}
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/* can be called in IRQ context */
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static void smc_ib_global_event_handler(struct ib_event_handler *handler,
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struct ib_event *ibevent)
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{
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struct smc_ib_device *smcibdev;
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u8 port_idx;
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smcibdev = container_of(handler, struct smc_ib_device, event_handler);
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switch (ibevent->event) {
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case IB_EVENT_PORT_ERR:
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case IB_EVENT_DEVICE_FATAL:
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case IB_EVENT_PORT_ACTIVE:
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port_idx = ibevent->element.port_num - 1;
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set_bit(port_idx, &smcibdev->port_event_mask);
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schedule_work(&smcibdev->port_event_work);
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break;
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default:
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break;
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}
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}
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void smc_ib_dealloc_protection_domain(struct smc_link *lnk)
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{
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if (lnk->roce_pd)
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ib_dealloc_pd(lnk->roce_pd);
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lnk->roce_pd = NULL;
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}
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int smc_ib_create_protection_domain(struct smc_link *lnk)
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{
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int rc;
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lnk->roce_pd = ib_alloc_pd(lnk->smcibdev->ibdev, 0);
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rc = PTR_ERR_OR_ZERO(lnk->roce_pd);
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if (IS_ERR(lnk->roce_pd))
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lnk->roce_pd = NULL;
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return rc;
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}
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static void smc_ib_qp_event_handler(struct ib_event *ibevent, void *priv)
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{
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struct smc_ib_device *smcibdev =
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(struct smc_ib_device *)ibevent->device;
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u8 port_idx;
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switch (ibevent->event) {
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case IB_EVENT_DEVICE_FATAL:
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case IB_EVENT_GID_CHANGE:
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case IB_EVENT_PORT_ERR:
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case IB_EVENT_QP_ACCESS_ERR:
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port_idx = ibevent->element.port_num - 1;
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set_bit(port_idx, &smcibdev->port_event_mask);
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schedule_work(&smcibdev->port_event_work);
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break;
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default:
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break;
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}
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}
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void smc_ib_destroy_queue_pair(struct smc_link *lnk)
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{
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if (lnk->roce_qp)
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ib_destroy_qp(lnk->roce_qp);
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lnk->roce_qp = NULL;
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}
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/* create a queue pair within the protection domain for a link */
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int smc_ib_create_queue_pair(struct smc_link *lnk)
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{
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struct ib_qp_init_attr qp_attr = {
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.event_handler = smc_ib_qp_event_handler,
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.qp_context = lnk,
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.send_cq = lnk->smcibdev->roce_cq_send,
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.recv_cq = lnk->smcibdev->roce_cq_recv,
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.srq = NULL,
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.cap = {
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/* include unsolicited rdma_writes as well,
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* there are max. 2 RDMA_WRITE per 1 WR_SEND
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*/
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.max_send_wr = SMC_WR_BUF_CNT * 3,
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.max_recv_wr = SMC_WR_BUF_CNT * 3,
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.max_send_sge = SMC_IB_MAX_SEND_SGE,
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.max_recv_sge = 1,
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},
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.sq_sig_type = IB_SIGNAL_REQ_WR,
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.qp_type = IB_QPT_RC,
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};
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int rc;
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lnk->roce_qp = ib_create_qp(lnk->roce_pd, &qp_attr);
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rc = PTR_ERR_OR_ZERO(lnk->roce_qp);
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if (IS_ERR(lnk->roce_qp))
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lnk->roce_qp = NULL;
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else
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smc_wr_remember_qp_attr(lnk);
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return rc;
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}
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void smc_ib_put_memory_region(struct ib_mr *mr)
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{
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ib_dereg_mr(mr);
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}
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static int smc_ib_map_mr_sg(struct smc_buf_desc *buf_slot)
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{
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unsigned int offset = 0;
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int sg_num;
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/* map the largest prefix of a dma mapped SG list */
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sg_num = ib_map_mr_sg(buf_slot->mr_rx[SMC_SINGLE_LINK],
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buf_slot->sgt[SMC_SINGLE_LINK].sgl,
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buf_slot->sgt[SMC_SINGLE_LINK].orig_nents,
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&offset, PAGE_SIZE);
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return sg_num;
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}
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/* Allocate a memory region and map the dma mapped SG list of buf_slot */
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int smc_ib_get_memory_region(struct ib_pd *pd, int access_flags,
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struct smc_buf_desc *buf_slot)
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{
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if (buf_slot->mr_rx[SMC_SINGLE_LINK])
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return 0; /* already done */
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buf_slot->mr_rx[SMC_SINGLE_LINK] =
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ib_alloc_mr(pd, IB_MR_TYPE_MEM_REG, 1 << buf_slot->order);
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if (IS_ERR(buf_slot->mr_rx[SMC_SINGLE_LINK])) {
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int rc;
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rc = PTR_ERR(buf_slot->mr_rx[SMC_SINGLE_LINK]);
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buf_slot->mr_rx[SMC_SINGLE_LINK] = NULL;
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return rc;
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}
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if (smc_ib_map_mr_sg(buf_slot) != 1)
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return -EINVAL;
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return 0;
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}
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/* synchronize buffer usage for cpu access */
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void smc_ib_sync_sg_for_cpu(struct smc_ib_device *smcibdev,
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struct smc_buf_desc *buf_slot,
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enum dma_data_direction data_direction)
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{
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struct scatterlist *sg;
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unsigned int i;
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/* for now there is just one DMA address */
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for_each_sg(buf_slot->sgt[SMC_SINGLE_LINK].sgl, sg,
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buf_slot->sgt[SMC_SINGLE_LINK].nents, i) {
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if (!sg_dma_len(sg))
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break;
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ib_dma_sync_single_for_cpu(smcibdev->ibdev,
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sg_dma_address(sg),
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sg_dma_len(sg),
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data_direction);
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}
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}
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/* synchronize buffer usage for device access */
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void smc_ib_sync_sg_for_device(struct smc_ib_device *smcibdev,
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struct smc_buf_desc *buf_slot,
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enum dma_data_direction data_direction)
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{
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struct scatterlist *sg;
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unsigned int i;
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/* for now there is just one DMA address */
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for_each_sg(buf_slot->sgt[SMC_SINGLE_LINK].sgl, sg,
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buf_slot->sgt[SMC_SINGLE_LINK].nents, i) {
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if (!sg_dma_len(sg))
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break;
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ib_dma_sync_single_for_device(smcibdev->ibdev,
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sg_dma_address(sg),
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sg_dma_len(sg),
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data_direction);
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}
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}
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/* Map a new TX or RX buffer SG-table to DMA */
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int smc_ib_buf_map_sg(struct smc_ib_device *smcibdev,
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struct smc_buf_desc *buf_slot,
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enum dma_data_direction data_direction)
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{
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int mapped_nents;
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mapped_nents = ib_dma_map_sg(smcibdev->ibdev,
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buf_slot->sgt[SMC_SINGLE_LINK].sgl,
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buf_slot->sgt[SMC_SINGLE_LINK].orig_nents,
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data_direction);
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if (!mapped_nents)
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return -ENOMEM;
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return mapped_nents;
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}
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void smc_ib_buf_unmap_sg(struct smc_ib_device *smcibdev,
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struct smc_buf_desc *buf_slot,
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enum dma_data_direction data_direction)
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{
|
|
if (!buf_slot->sgt[SMC_SINGLE_LINK].sgl->dma_address)
|
|
return; /* already unmapped */
|
|
|
|
ib_dma_unmap_sg(smcibdev->ibdev,
|
|
buf_slot->sgt[SMC_SINGLE_LINK].sgl,
|
|
buf_slot->sgt[SMC_SINGLE_LINK].orig_nents,
|
|
data_direction);
|
|
buf_slot->sgt[SMC_SINGLE_LINK].sgl->dma_address = 0;
|
|
}
|
|
|
|
static int smc_ib_fill_gid_and_mac(struct smc_ib_device *smcibdev, u8 ibport)
|
|
{
|
|
struct ib_gid_attr gattr;
|
|
int rc;
|
|
|
|
rc = ib_query_gid(smcibdev->ibdev, ibport, 0,
|
|
&smcibdev->gid[ibport - 1], &gattr);
|
|
if (rc || !gattr.ndev)
|
|
return -ENODEV;
|
|
|
|
memcpy(smcibdev->mac[ibport - 1], gattr.ndev->dev_addr, ETH_ALEN);
|
|
dev_put(gattr.ndev);
|
|
return 0;
|
|
}
|
|
|
|
/* Create an identifier unique for this instance of SMC-R.
|
|
* The MAC-address of the first active registered IB device
|
|
* plus a random 2-byte number is used to create this identifier.
|
|
* This name is delivered to the peer during connection initialization.
|
|
*/
|
|
static inline void smc_ib_define_local_systemid(struct smc_ib_device *smcibdev,
|
|
u8 ibport)
|
|
{
|
|
memcpy(&local_systemid[2], &smcibdev->mac[ibport - 1],
|
|
sizeof(smcibdev->mac[ibport - 1]));
|
|
get_random_bytes(&local_systemid[0], 2);
|
|
}
|
|
|
|
bool smc_ib_port_active(struct smc_ib_device *smcibdev, u8 ibport)
|
|
{
|
|
return smcibdev->pattr[ibport - 1].state == IB_PORT_ACTIVE;
|
|
}
|
|
|
|
int smc_ib_remember_port_attr(struct smc_ib_device *smcibdev, u8 ibport)
|
|
{
|
|
int rc;
|
|
|
|
memset(&smcibdev->pattr[ibport - 1], 0,
|
|
sizeof(smcibdev->pattr[ibport - 1]));
|
|
rc = ib_query_port(smcibdev->ibdev, ibport,
|
|
&smcibdev->pattr[ibport - 1]);
|
|
if (rc)
|
|
goto out;
|
|
/* the SMC protocol requires specification of the RoCE MAC address */
|
|
rc = smc_ib_fill_gid_and_mac(smcibdev, ibport);
|
|
if (rc)
|
|
goto out;
|
|
if (!strncmp(local_systemid, SMC_LOCAL_SYSTEMID_RESET,
|
|
sizeof(local_systemid)) &&
|
|
smc_ib_port_active(smcibdev, ibport))
|
|
/* create unique system identifier */
|
|
smc_ib_define_local_systemid(smcibdev, ibport);
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
long smc_ib_setup_per_ibdev(struct smc_ib_device *smcibdev)
|
|
{
|
|
struct ib_cq_init_attr cqattr = {
|
|
.cqe = SMC_MAX_CQE, .comp_vector = 0 };
|
|
int cqe_size_order, smc_order;
|
|
long rc;
|
|
|
|
/* the calculated number of cq entries fits to mlx5 cq allocation */
|
|
cqe_size_order = cache_line_size() == 128 ? 7 : 6;
|
|
smc_order = MAX_ORDER - cqe_size_order - 1;
|
|
if (SMC_MAX_CQE + 2 > (0x00000001 << smc_order) * PAGE_SIZE)
|
|
cqattr.cqe = (0x00000001 << smc_order) * PAGE_SIZE - 2;
|
|
smcibdev->roce_cq_send = ib_create_cq(smcibdev->ibdev,
|
|
smc_wr_tx_cq_handler, NULL,
|
|
smcibdev, &cqattr);
|
|
rc = PTR_ERR_OR_ZERO(smcibdev->roce_cq_send);
|
|
if (IS_ERR(smcibdev->roce_cq_send)) {
|
|
smcibdev->roce_cq_send = NULL;
|
|
return rc;
|
|
}
|
|
smcibdev->roce_cq_recv = ib_create_cq(smcibdev->ibdev,
|
|
smc_wr_rx_cq_handler, NULL,
|
|
smcibdev, &cqattr);
|
|
rc = PTR_ERR_OR_ZERO(smcibdev->roce_cq_recv);
|
|
if (IS_ERR(smcibdev->roce_cq_recv)) {
|
|
smcibdev->roce_cq_recv = NULL;
|
|
goto err;
|
|
}
|
|
INIT_IB_EVENT_HANDLER(&smcibdev->event_handler, smcibdev->ibdev,
|
|
smc_ib_global_event_handler);
|
|
ib_register_event_handler(&smcibdev->event_handler);
|
|
smc_wr_add_dev(smcibdev);
|
|
smcibdev->initialized = 1;
|
|
return rc;
|
|
|
|
err:
|
|
ib_destroy_cq(smcibdev->roce_cq_send);
|
|
return rc;
|
|
}
|
|
|
|
static void smc_ib_cleanup_per_ibdev(struct smc_ib_device *smcibdev)
|
|
{
|
|
if (!smcibdev->initialized)
|
|
return;
|
|
smcibdev->initialized = 0;
|
|
smc_wr_remove_dev(smcibdev);
|
|
ib_unregister_event_handler(&smcibdev->event_handler);
|
|
ib_destroy_cq(smcibdev->roce_cq_recv);
|
|
ib_destroy_cq(smcibdev->roce_cq_send);
|
|
}
|
|
|
|
static struct ib_client smc_ib_client;
|
|
|
|
/* callback function for ib_register_client() */
|
|
static void smc_ib_add_dev(struct ib_device *ibdev)
|
|
{
|
|
struct smc_ib_device *smcibdev;
|
|
|
|
if (ibdev->node_type != RDMA_NODE_IB_CA)
|
|
return;
|
|
|
|
smcibdev = kzalloc(sizeof(*smcibdev), GFP_KERNEL);
|
|
if (!smcibdev)
|
|
return;
|
|
|
|
smcibdev->ibdev = ibdev;
|
|
INIT_WORK(&smcibdev->port_event_work, smc_ib_port_event_work);
|
|
|
|
spin_lock(&smc_ib_devices.lock);
|
|
list_add_tail(&smcibdev->list, &smc_ib_devices.list);
|
|
spin_unlock(&smc_ib_devices.lock);
|
|
ib_set_client_data(ibdev, &smc_ib_client, smcibdev);
|
|
}
|
|
|
|
/* callback function for ib_register_client() */
|
|
static void smc_ib_remove_dev(struct ib_device *ibdev, void *client_data)
|
|
{
|
|
struct smc_ib_device *smcibdev;
|
|
|
|
smcibdev = ib_get_client_data(ibdev, &smc_ib_client);
|
|
ib_set_client_data(ibdev, &smc_ib_client, NULL);
|
|
spin_lock(&smc_ib_devices.lock);
|
|
list_del_init(&smcibdev->list); /* remove from smc_ib_devices */
|
|
spin_unlock(&smc_ib_devices.lock);
|
|
smc_pnet_remove_by_ibdev(smcibdev);
|
|
smc_ib_cleanup_per_ibdev(smcibdev);
|
|
kfree(smcibdev);
|
|
}
|
|
|
|
static struct ib_client smc_ib_client = {
|
|
.name = "smc_ib",
|
|
.add = smc_ib_add_dev,
|
|
.remove = smc_ib_remove_dev,
|
|
};
|
|
|
|
int __init smc_ib_register_client(void)
|
|
{
|
|
return ib_register_client(&smc_ib_client);
|
|
}
|
|
|
|
void smc_ib_unregister_client(void)
|
|
{
|
|
ib_unregister_client(&smc_ib_client);
|
|
}
|